Title:
PRINTED WIRING BOARD MANUFACTURING METHOD AND PRINTED WIRING BOARD
Document Type and Number:
Japanese Patent JP3879132
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method of stably forming solder bumps on soldering lands on a printed wiring board, without a complicated process.
SOLUTION: After vacuum-overlaying, exposing and developing of a negative mask film 4 on a photolytic photosensitive film 3 laid on a conductive layer 2, the masked part 5 is electroplated with solder to form a solder plated layer 6. A positive mask film 7 for a circuit pattern is vacuum-overlaid on the film 3 and exposed and developed to form an etch resist 8. The conductive layer 2 is etched with an alkali etching liq. to form a conductor circuit 10 and soldering lands 9 from the conductive layer 2 beneath the plated layer 6. A solder resist 11 is formed to obtain a printed wiring board having a solder layer of fixed thickness on required part.
Inventors:
Kazutomo Higa
Application Number:
JP3941196A
Publication Date:
February 07, 2007
Filing Date:
February 27, 1996
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H05K3/24; H05K3/28; H05K3/06; (IPC1-7): H05K3/24; H05K3/06; //H05K3/28
Domestic Patent References:
| JP799384A | ||||
| JP1201992A | ||||
| JP1196196A | ||||
| JP7162131A | ||||
| JP669649A | ||||
| JP298993A | ||||
| JP2258166A | ||||
| JP3136296A | ||||
| JP7326853A |
Attorney, Agent or Firm:
Fumio Iwahashi
Hiroki Naito
Daisuke Nagano
Hiroki Naito
Daisuke Nagano
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