Title:
PROGRAMMABLE CONTROLLER
Document Type and Number:
Japanese Patent JPH04283804
Kind Code:
A
Abstract:
PURPOSE:To offer the programmable controller which realize a speedy NOP process. CONSTITUTION:A flip-flop 205 is provided between write signal lines 209-2 and 209-3 connecting an arithmetic processor 201 and a data memory 202. At the start of the NOP process, the arithmetic processor 201 controls an address decoder 203 with a signal A, an OR gate 204 with a signal, the inverse of W, and the flip-flop 205 with a signal, the inverse of D, thereby holding one input terminal of an OR gate 206 at 'H'. Consequently, even when arithmetic operation is performed afterward and the signal, the inverse of W for writing the result is made active or held at 'L' level, the output, the inverse of W from the flip-flop 205 rises to 'H' level, so no data is written. Namely, an output signal for sequence control is prevented from being generated.
More Like This:
| JP2023058938 | CONTROL DEVICE, CONTROL SYSTEM, AND TIME SYNCHRONIZATION METHOD |
| JP2864759 | [Title of Invention] Programmable Controller |
| JP2017102528 | PROGRAMMABLE CONTROLLER |
Inventors:
YATSUDA YUTAKA
Application Number:
JP4835391A
Publication Date:
October 08, 1992
Filing Date:
March 13, 1991
Export Citation:
Assignee:
FUJI ELECTRIC CO LTD
International Classes:
G05B19/05; (IPC1-7): G05B19/05
Attorney, Agent or Firm:
Yoshiyuki Osuge