Title:
PULSE WIDTH REGULATOR
Document Type and Number:
Japanese Patent JPS5557901
Kind Code:
A
Abstract:
PURPOSE:To reduce the number of times of the ON-OFF operation of a motor driven by a pulse output, by generating output signals of pulse width in proportion to deviation between outputs of 1st and 2nd comparators at even intervals. CONSTITUTION:In a control circuit for a pulse width regulator, measurement signal 1 and set signal 2 are inputted to deviation detector A1, which sends output 3 of 2epsilon (epsilon is a difference between signals 1 and 2.) and output 4 of 2epsilonkp (kp is a voltage dividing ratio.) to the (-) input of operational amplifier A2 for linear integrating circuit PI through capacitor C1. Further, A2 is applied with constant voltages of +V and -V by way of resistance R3 through switch elements Q1 and Q2 controlled selectively by outputs of comparators COM-1 and COM-2 to close switch SW4, so that intervals of pulse outputs will increase in inverse proportion to a decrease in input value of A2. Next, output signal E1 is applied to one-side inputs 61 and 62 of COM-1 and COM-2, and voltages of outputs A and B of hysteresis width setting circuit HW are to other-side inputs 63 and 64.
Inventors:
HIRANO MASAHIRO
Application Number:
JP13140078A
Publication Date:
April 30, 1980
Filing Date:
October 25, 1978
Export Citation:
Assignee:
YOKOGAWA ELECTRIC WORKS LTD
International Classes:
G05B11/42; F16K31/02; G05B11/26; G05B11/28; H03K7/08; H03L5/00; (IPC1-7): F16K31/02; G05B11/28; G05B11/42; H03K7/08; H03L5/00