Title:
PWM DEMODULATOR CIRCUIT, RECEIVER AND TRANSMISSION SYSTEM
Document Type and Number:
Japanese Patent JP2016046536
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a PWM demodulator circuit capable of handling wide range data rate from low speed to high speed with a small electric power.SOLUTION: The PWM demodulator circuit includes a counter section which, in a second period following a first period in a predetermined pulse period of a PWM signal, calculates a second counter value by counting down a first counter value which is obtained by counting up in the first period.SELECTED DRAWING: Figure 1
Inventors:
SHIMOMURA YUKIO
YAMADA YASUHIRO
YAMADA YASUHIRO
Application Number:
JP2014166661A
Publication Date:
April 04, 2016
Filing Date:
August 19, 2014
Export Citation:
Assignee:
SONY CORP
International Classes:
H03K9/08; H04L25/49
Attorney, Agent or Firm:
Patent Business Corporation Tsubasa International Patent Office
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