To reduce power consumption by providing the recycle of signal charges for driving a gate by supplying the output of analog resonance circuit directly or indirectly through a switching means to a CCD gate driving electrode as an AC component.
A clock signal X applies the operation timing of switching means SW according to the assign table of driving signal source Rj to a driving electrode Pi and controls the supply of energy to a resonance circuit through operation for recovering the amplitude of resonance output periodically to a prescribed value. The connection of driving electrode PO through an electrode SWO to any one of four directions is controlled by a select signal applied from the outside at prescribed timing. When a maximum amplitude potential is connected to the driving electrode PO, charges determined according to capacity are stored in the CCD gate connected to the driving electrode PO and when the output amplitude of resonance is less than the maximum amplitude potential, it is maintained at the fixed amplitude by replenishing one part of charges.
NAGAZUMI YASUO