SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Japanese Patent JP3204164

B2

PROBLEM TO BE SOLVED: To secure the EM life of a power supply line without increasing the capacitance of a signal line and besides narrow a width of the power supply line by a method wherein a wire width and a film thickness of the power supply line are larger that a wire width of a signal line and a film thickness of the signal line.
SOLUTION: An insulation film 2 and a conductive film 3 are formed on a semiconductor substrate 1. A signal line 4 and a power supply line 5 are formed using a lithography technique and an etching technique. Thereafter, an insulation film 6 is formed and a flatting applying film 7 is applied and baked. At this time, it is thin on the signal line 4 of a fine wire width and thick on the power supply line 5 of a thick wire width due to an original property of the applying film 7. For this reason, if anisotropic etch-back is carried out until a surface of the signal line 4 is exposed, the surface of the power supply line 5 is not exposed. Only the signal line 4 is etched on conditions that an etching rate is high, and a film thickness of the signal line 4 is set about half the original size. Thereafter, a flatting applying film 8 and an insulation film 9 are formed.

JP3687651	Thin film forming method
JP2008098581	SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
JPS5334484	FORMING METHOD FOR MULTI LAYER WIRING

Takehiro Aritoku

JP15773297A

September 04, 2001

May 30, 1997

Click for automatic bibliography generation  

NEC

H01L21/3205; H01L21/822; H01L23/52; H01L27/04; (IPC1-7): H01L21/3205; H01L21/822; H01L27/04

JP267730A
JP4372133A
JP2301153A

Asamichi Kato

Previous Patent: A balance weight device of a making machine

Next Patent: METHOD FOR EXECUTING LINING WORK IN MOLTEN METAL VESSEL