Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2023108349
Kind Code:
A
Abstract:
To provide a semiconductor device capable of suppressing formation of an inversion layer in an isolation region to suppress a leakage current from a high-voltage circuit region to the isolation region and a transistor element region.SOLUTION: A semiconductor device comprises a high-voltage circuit region 2A, a transistor element region 2B, an isolation region 4 for element isolation between the transistor element region and the high-voltage circuit region, and capacitively coupled field plates 20A and 20B each including a plurality of rows of conductors, these regions and plates being provided on a semiconductor substrate. In a plan view of the semiconductor device, the capacitively coupled field plate 20B is arranged so as to transverse the transistor element region 2B and surround the high-voltage circuit region 2A. At least one row of the plurality of rows of conductors in the capacitively coupled field plates comprises a dividing part that divides the conductor to make it discontinuous.SELECTED DRAWING: Figure 6
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Inventors:
AOKI HIRONORI
Application Number:
JP2022009416A
Publication Date:
August 04, 2023
Filing Date:
January 25, 2022
Export Citation:
Assignee:
SANKEN ELECTRIC CO LTD
International Classes:
H01L29/06; H01L21/336; H01L21/76; H01L21/8234; H01L21/8238
Attorney, Agent or Firm:
Mikio Yoshimiya
Toshihiro Kobayashi
Toru Otsuka
Toshihiro Kobayashi
Toru Otsuka