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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH0465167
Kind Code:
A
Abstract:

PURPOSE: To prevent a conductive wiring layer and a semiconductor substrate from being short-circuited if a contact between polycrystalline silicon layer and a conductive wiring layer is formed by providing a second conductivity type impurity diffused layer on a lower region of a contact hole.

CONSTITUTION: An impurity diffused layer 18 is formed on a semiconductor substrate l under a contact hole 8. In the layer 18, an opposite conductivity type impurity to that to the substrate l is doped, and a p-n junction is formed in a boundary to the substrate 1. For example, when the substrate 1 is mounted and a positive bias voltage is applied to a conductive wiring layer 9, a reverse bias is applied to the p-n junction. Accordingly, even if the layer 9 is connected to the substrate 1 through a polycrystalline silicon layer 3 and an oxide film 2 at the bottom of the hole 8, an insulation between the layer 9 and the substrate l is obtained, no current leakage occurs through the substrate l. Thus, a desired bias voltage is effectively applied to the layer 3 as a field shielding electrode, and shielding characteristic is held excellently to provide satisfactory shielding characteristic.


Inventors:
KATAYAMA TOSHIHARU
Application Number:
JP17921290A
Publication Date:
March 02, 1992
Filing Date:
July 05, 1990
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L29/41; H01L21/765; (IPC1-7): H01L29/44
Attorney, Agent or Firm:
Fukami Hisaro (2 outside)



 
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