To provide a semiconductor integrated circuit capable of realizing a high-speed lock operation.

In this semiconductor integrated circuit, the interruption state of carrier signals or the carrier signal out of a valid frequency range is detected by a carrier detection circuit 11 and a signal changeover circuit 10 inputs an external clock 2 instead of the carrier signal to a phase comparator circuit 12 corresponding to the detected result. Thus, a lock state is held in a PLL (phase locked loop) composed of the phase comparator circuit 12, a charge pump 13, a loop filter 14, a voltage controlled oscillator 15 and a 1/N frequency divider 16 and the high speed lock operation to the appropriate carrier signal again is realized.