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Patent Searching and Data


Title:
SEMICONDUCTOR MEMORY CIRCUIT
Document Type and Number:
Japanese Patent JPS61165882
Kind Code:
A
Abstract:

PURPOSE: To decide optionally the state of a semiconductor memory circuit when a power supply is applied by fixing the state of the memory circuit at a prescribed high or low level, by connecting the terminal at one side of a circular coupling inverter to the power supply or grounding it via a resistance.

CONSTITUTION: When the power supply voltage level rises up, inverters 101 and 102 are going to be set at a high or low level. In this case, however, the power supply voltage rises up to a prescribed potential while the input of the inverter 101 is kept at a low level together with a terminal 108 grounded via a resistance 105 respectively. As a result, the output of the inverter 101 is set at a high level with the output of the inverter 102 set at a low level respectively. In such a way, the state of a semiconductor memory circuit is decided when a power supply is applied. Then this decided state is read out by opening a gate 109 of a MOS transistor 103, and an output of a low level is outputted to a terminal 110.


Inventors:
WADA TAKAMICHI
Application Number:
JP640485A
Publication Date:
July 26, 1986
Filing Date:
January 17, 1985
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G11C11/401; G11C11/34; G11C11/41; (IPC1-7): G11C11/34
Attorney, Agent or Firm:
Toshio Nakao