SEMICONDUCTOR MEMORY DEVICE AND SYSTEM MOUNTED WITH THE SAME

Japanese Patent JP3848004

B2

PROBLEM TO BE SOLVED: To make the semiconductor memory device redundant without using fuses by storing defective information of a memory cell in non-volatile memory, or testing the memory cell with plural different access voltages every time when starting the device.
SOLUTION: In the case that there is a defective bit as a result of defective bit test by starting a BISR circuit 5 for testing at shipment, this redundancy information is held and stored in a register. The held redundancy information is selected by MUX of a write circuit 4 of the corresponding bit, and is written in a memory cell of a program array 7 via a write buffer and a bit line, to be programmed. After shipment, the redundancy information stored in the program array 7 in the non-volatile state is read out by a read circuit 3 and stored in a register of the BISR circuit 5 of the corresponding bit, and the defective bit is re-located at a redundancy bit column 6 according to the redundancy information stored in the register.

JP2001093993	SEMICONDUCTOR DEVICE
JPS59186361	NONVOLATILE SEMICONDUCTOR DEVICE
JPH0373492	SEMICONDUCTOR STORAGE DEVICE

Urakawa Yukihiro

JP6553199A

November 22, 2006

March 11, 1999

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Toshiba Corporation

G11C11/413; G11C29/04; G06F12/16; G11C11/401; G11C16/06; G11C29/00; H01L27/10; (IPC1-7): G11C29/00; G06F12/16; G11C11/413; G11C11/401; G11C16/06; H01L27/10

JP7334999A
JP11031398A
JP11031399A
JP7085698A
JP6111599A
JP5205464A
JP10275485A
JP11144500A

Hidekazu Miyoshi
Iwa Saki Kokuni
Kawamata Sumio
Nakamura Tomoyuki
Masakazu Ito
Shunichi Takahashi
Toshio Takamatsu

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