SEMICONDUCTOR MEMORY STORAGE AND MANUFACTURE THEREOF

Japanese Patent JP3869025

B2

PURPOSE: To simultaneously manufacture a floating gate type memory cell, with which switching of the redundant circuit of a DRAM is conducted, and a one-transistor/one capacitor type DRAM memory cell.
CONSTITUTION: After a gate oxide film 4 of DRAM memory cell and a tunnel oxide film 6 of floating gate type memory cell have been simultaneously formed on the same silicon substrate 1, a DRAM memory cell gate electrode 5, a floating gate type memory cell floating gate lower part 7', a DRAM memory cell capacitor lower electrode 13 and a floating gate type memory cell floating gate upper part 7", a DRAM memory cell capacitor upper electrode 17 and a floating gate type memory cell control gate 18 are formed using the same polysilicon film. Also, a DRAM memory cell capacitor dielectric film 15 and a dielectric film 16 between a floating gates type memory cell floating gate/ control are formed simultaneously.

Amano Shigeki
Yasuo Sato

JP33824994A

January 17, 2007

December 27, 1994

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Unihua Electronics Co., Ltd.

H01L21/82; H01L21/8242; H01L21/8246; H01L21/8247; H01L27/10; H01L27/105; H01L27/108; H01L27/115; H01L29/788; H01L29/792; (IPC1-7): H01L21/8242; H01L27/108; H01L21/82; H01L27/105

JP56103468A
JP2218157A

Takayoshi Kokubun

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