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Title:
SERIAL INTERFACE
Document Type and Number:
Japanese Patent JPH0482444
Kind Code:
A
Abstract:

PURPOSE: To easily detect the error of a signal and to display it as an error flag by extracting a period which is assumed as the error as the pulse period of an error detection permission signal when the fluctuation of a data occurs.

CONSTITUTION: An edge detection circuit 11 detects level change generated in a shift clock 14 after passing a buffer 6, and outputs an edge detection signal 15. When the signal 15 is generated in the pulse period when the error permission signal represents a permission state, the information of the fact is held with the error flag 12, and the fact that a noise is generated in the shift clock and the mis-shift of data occurs is displayed. Thereby, the presence/absence of the error in a reception signal can be easily detected.


Inventors:
HAMAGUCHI ZENEI
Application Number:
JP19722890A
Publication Date:
March 16, 1992
Filing Date:
July 25, 1990
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03M9/00; H04L25/02; H04L69/40; (IPC1-7): H03M9/00; H04L25/02; H04L29/14
Attorney, Agent or Firm:
Shigetaka Awano (1 person outside)



 
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