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Title:
SERIAL INPUT/PARALLEL OUTPUT MEMORY CIRCUIT
Document Type and Number:
Japanese Patent JPH0444699
Kind Code:
A
Abstract:

PURPOSE: To enable a high-speed operation by parallelly outputting data to be serially inputted for every N number of data.

CONSTITUTION: The data is read out by reading it out from data output lines 161-16N and after completely reading it out, a signal at a 1 level is inputted from a control line 174 for output. Continuously, when the control line 174 for output is turned to a 0 level and a state memory 13N+1 in set in the state of data presence, namely, in the state of Q=1, an operational state is set and the transfer of the data is started similarly to a conventional example and turned to a standstill state when the transfer of N steps is completed finally.


Inventors:
SUGITANI TOSHIYUKI
YAMASHITA HIDEHIRO
Application Number:
JP15190990A
Publication Date:
February 14, 1992
Filing Date:
June 11, 1990
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G11C19/00; H03M9/00; (IPC1-7): G11C19/00; H03M9/00
Attorney, Agent or Firm:
Shigetaka Awano (1 person outside)



 
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