To provide a signal detector which can fast analyze the observed data without changing the logic of an FPGA(field programmable gate array) for every change of the observed data when the data stored in plural FPGAs are observed.

This signal detector 100 includes plural programmable logical elements 10 which can construct a digital circuit and an arithmetic element which processes the signals desiring the observation. Then the branch lines which branch the output lines of elements 10 are added to the device 100 together with a programmable switch element 20 which selects at least one of the branch lines connected to an input terminal of the element 20. The same length is set between the branching points of output lines of elements 10 and the input terminal of the element 20 respectively.