Title:
SIGNAL FREQUENCY SYNCHRONIZER
Document Type and Number:
Japanese Patent JPH01316042
Kind Code:
A
Abstract:
PURPOSE: To synchronize plural signal frequency sources by providing a frequency comparing means for comparing a local clock frequency with a trunk clock frequency, and sending a correct signal through a control link to an adaptable signal source. CONSTITUTION: A frequency comparator 31, provided inside a trunk card 23, compares the frequency of a local clock frequency signal generated from an oscillator 33 provided inside a service card 21 with the rate of data sent from the card 23 at a remote system. As a result, when there is difference in the clock frequency, correction work, namely, a clock adjustment message is outputted and sent through a control bus 25 to the card 21 and the output clock frequency of the oscillator 33 is adjusted. In this case, usually, the local clock frequency source is adjusted, corresponding to the rate of input data, the rate of input data is determined by system master clock velocity, and representative frequency signal rate is defined as 2.048MHz. Thus, plural signal frequency sources can be synchronized through the bus 25.
Inventors:
TEIMOSHII JIYON HANIIBOORU
Application Number:
JP10149989A
Publication Date:
December 20, 1989
Filing Date:
April 20, 1989
Export Citation:
Assignee:
PLESSEY TELECOMM
International Classes:
H04L7/00; G04B31/08; H04J3/06; (IPC1-7): H04L7/00
Attorney, Agent or Firm:
Akira Asamura (2 outside)