Title:
SIGNAL PROCESSING UNIT
Document Type and Number:
Japanese Patent JP3211104
Kind Code:
B2
Abstract:
PURPOSE: To provide the signal processing unit in which noise elimination in a noise filter circuit is less malfunctioned and high speed processing is executed.
CONSTITUTION: Raw data (analog signal) are inputted to a multi-stage comparator (for discrete multi-value processing) 1 comprising plural analog comparators and its output connects to a multi-stage shift register (storing discrete multi- value data in time series) 2 and a low pass filter 3 whose time constant is variable. The output of the multi-stage shift register (time series discrete data) is respectively connected to an averaging filter 4 and a noise discrimination means 5. Then outputs of both the filters are synthesized through a weighting means 6 and the result is outputted as noise elimination data. Then the noise discrimination means obtains how a signal is like a noise by the fuzzy inference or the like, and filter control means 7, 8 revise a time constant of the low pass filter and a coefficient α of the weight means based on the result of inference.
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Inventors:
Yasuhiro Tsutsumi
Application Number:
JP5914492A
Publication Date:
September 25, 2001
Filing Date:
February 14, 1992
Export Citation:
Assignee:
Omron Corporation
International Classes:
H03H21/00; H03H17/00; H03H17/02; H04B1/10; (IPC1-7): H03H21/00; H03H17/02; H04B1/10
Domestic Patent References:
| JP3162117A | ||||
| JP5628531A | ||||
| JP61196624A | ||||
| JP2109428A |
Attorney, Agent or Firm:
Shinichi Matsui