Title:
SIMULATOR
Document Type and Number:
Japanese Patent JP3398178
Kind Code:
B2
Abstract:
PURPOSE: To provide a development tool which can correctly debug the program of a microcomputer on a host computer in short time and which can improve the efficiency of system development.
CONSTITUTION: An analysis processing means 21 which analysis-processes an assembly list 12 generated by the source program of a target system on the host computer and obtains a code table 22 and a text table 23, a check processing means 15 detecting an error based on the code table 22 and the text table 23, an analysis execution means 16 which translates the instruction code of the code table 22 into the instruction string of the host computer for respective instructions, a display processing means 17 executing a processing for displaying the error detection result of the check processing means 15 and the execution result of the analysis execution means 16 in a monitor 18, and a command processing means 19 processing a command for an analysis processing means 14, the check processing means 15, the analysis execution means 16 and the display processing means 17 are provided.
Inventors:
Takayuki Takeya
Application Number:
JP14825693A
Publication Date:
April 21, 2003
Filing Date:
May 28, 1993
Export Citation:
Assignee:
CSK Corporation
International Classes:
G06F11/28; G06F15/78; (IPC1-7): G06F11/28; G06F15/78
Domestic Patent References:
| JP3102540A | ||||
| JP4337847A | ||||
| JP626342A | ||||
| JP1271848A |
Attorney, Agent or Firm:
Takao Sakurai
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