Title:
固体撮像装置
Document Type and Number:
Japanese Patent JP5738739
Kind Code:
B2
Abstract:
In this solid-state imaging device, an output signal of any one of a plurality of delay units that output signals of logic states in accordance with a level of a pixel signal is input to an input terminal of a latch circuit that latches a logic state of the output signal. A NAND circuit and an INV circuit stop until a control signal output timing at which a control signal in accordance with the level of the pixel signal is output, and operate after the control signal output timing. A switch circuit outputs the output signal of the one of the plurality of delay units through a signal line from an output terminal until the control signal output timing, and switches a connection at a latch timing after a predetermined time elapses from the control signal output timing such that the NAND circuit and the INV circuit latch the logic state of the output signal of the one of the plurality of delay units.
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Inventors:
Takanori Tanaka
Susumu Yamazaki
Susumu Yamazaki
Application Number:
JP2011236021A
Publication Date:
June 24, 2015
Filing Date:
October 27, 2011
Export Citation:
Assignee:
Olympus Endo Technology America Inc.
International Classes:
H04N5/3745; H03M1/56
Domestic Patent References:
| JP2011146859A | ||||
| JP2011055196A | ||||
| JP2011019136A |
Attorney, Agent or Firm:
Sumio Tanai
Masatake Shiga
Suzuki Mitsuyoshi
Tadao Takashiba
Hiroshi Masui
Shiro Suzuki
Hiroyuki Hashimoto
Masatake Shiga
Suzuki Mitsuyoshi
Tadao Takashiba
Hiroshi Masui
Shiro Suzuki
Hiroyuki Hashimoto