PURPOSE: To reduce interference noise by stopping a frequency divider generating a frequency divider signal not selected by a frequency divider signal selector.
CONSTITUTION: A stop controller 1 provided in the inside of a switched capacitor filter(SCF) driving clock signal generator 8 outputs a stop signal to stop each frequency divider to any of signal lines 3-5 by using a control signal outputted to a signal line 2 from an external device 6 and the frequency divider receiving the stop signal is stopped. A frequency divider signal selector 15 uses a signal of a selection control signal line 10 outputted from the external device 6 so as to select the required frequency divider signal and an SCF drive clock signal 17 is outputted to the signal line. The SCF drive clock signal 17 is inputted to the SCF 18 to form a filter having a required band. Thus, no signal exists in mixture in other frequency divider in the interference noise generated in the frequency divider signal selector 15 and the noise level is minimized.
NAKATSUKA JUNJI
JPS58105613A | 1983-06-23 | |||
JPS6390910A | 1988-04-21 | |||
JPS6318721A | 1988-01-26 |