PURPOSE: To provide the synchronizing system for binary serial data communication with which transmission P and Q channels can be secured and proper decoding is enabled on reception side equipment even when step-out of frame synchronization occurs in the middle of data transmission because of radio wave hit or the like.

CONSTITUTION: A system is composed of a serial/parallel converter 41, viterbi decoder 51 and frame synchronizing detection circuit 61 for processing binary serial data in order to transmit input data in the state of inserting a frame synchronizing pattern to respective frames as the binary serial data, in which the bit of the P channel and the bit of the Q channel alternately appear, by encoding those input data with the convolusion encoder of a 1/2 encoding ratio on the transmission side. In order to provide a proper data sequence by fixing the P and Q channels and detecting the frame synchronizing pattern on the reception side, a system is composed of a serial/parallel converter 42, Viterbi decoder 52 and frame synchronizing detecting circuit 62 for processing one-bit delayed data of binary serial data.