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Title:
TIMING CLOCK EXTRACTION CIRCUIT
Document Type and Number:
Japanese Patent JPH0255439
Kind Code:
A
Abstract:

PURPOSE: To simplify the adjustment operation of a timing clock extraction circuit of an optical receiver by adopting a constitution such that a constant current source is connected to emitters of two opposite transistors(TRs), the emitters are coupled by a capacitor, signals of opposite phase are inputted to two bases and an output signal is obtained from the collector.

CONSTITUTION: When signals of opposite phase to each other are inputted to bases of two TRs 120, 130, the emitter potentials are apt to be changed similarly. However, since a capacitor 140 is connected, the charging/discharge time of the capacitor 140 is required to cause a voltage change. Then the discharge time (t) of the capacitor 140 is expressed as t=C×2V/I, where l is a current flowing to a constant current source 150, C is a capacitance of the capacitor 140 and V is a voltage between Hi and Lo levels of the input signal. As a result, the time (t) is set to a prescribed value and the adjustment of timing clock extraction is facilitated by adjusting the current I.


Inventors:
HAMANO HIROSHI
YAMAMOTO TAKUJI
AMAMIYA IZUMI
ARAI YASUNARI
IHARA TAKESHI
Application Number:
JP20678588A
Publication Date:
February 23, 1990
Filing Date:
August 20, 1988
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04L7/027; (IPC1-7): H04L7/027
Attorney, Agent or Firm:
Sadaichi Igita



 
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