PURPOSE: To attain the general purpose use of a timing generator by making the generating of a master clock having frequencies of a wide range possible.

CONSTITUTION: The timing generator generates a master clock synchronized with a video signal having a prescribed specification and also supplies a prescribed timing control signal to an active matrix type display panel according to the master clock. The timing generator is provided with three pices of PLL oscillation circuits 1, 2,3 which are assigned to different frequency bands and one pair of an input selector 4 and an output selector 5 selecting a corresponding PLL oscillation circuit according to the specification of an inputted video signal. A selected PLL oscillation circuit oscillates a master clock synchronized with a horizontal synchronizing signal HSYC included in the inputted image signal within the range of oscillation frequency bands. For example, a first PLL oscillation circuit 1 is of a phase locked close-loop connecting respective structural elements consisting of a phase comparator 11, a low-pass filter 12, a voltage controlled oscillator 13 and a I/N frequency divider 7 and then the assignment of oscillation frequency bands is performed by locking parameters of respective structural elements.