Title:
【発明の名称】電流分割器
Document Type and Number:
Japanese Patent JP2948931
Kind Code:
B2
Abstract:
Dynamic accurate current divider which comprises current memory circuits (M2-C1-S3, M3-C2-S4) by means of which an input current (Iin) to be split up is divided into two almost equally large output currents (Iout1, Iout2). Under the control of a clock generator (9) having two-phase switching cycles, any inequalities in the output currents are equalised by means of the current memory circuits in a number of cycles of the clock generator.
Inventors:
DEIRUKU UOOTAA YOHANESU FURUUNEFUERUDO
Application Number:
JP5029391A
Publication Date:
September 13, 1999
Filing Date:
February 25, 1991
Export Citation:
Assignee:
KONIN* FUIRITSUPUSU EREKUTORONIKUSU NV
International Classes:
H03M1/06; H03M1/74; (IPC1-7): H03M1/74
Domestic Patent References:
| JP252523A | ||||
| JP5735418A |
Attorney, Agent or Firm:
Akihide Sugimura (5 outside)