PURPOSE: To discriminate the division of two data strings and to write two or more data arrays in one first in first out (FIFO) memory by turning flag bit to "1" in accordance with the final data of the data array and sifting the data array synchronously with the transfer of data in a stack memory.

CONSTITUTION: An input controlling circuit 1 turns the discrimination flag bit for the final data of input data to "1" by disconnecting an enable signal E and outputs the bit "1". When a part B0, B1 of the succeeding data array B0WBn under the presence of data array A0WAm are inputted and stored, the contents of a stack controlling circuit 3, a flag register 4 and a stack memory 5 are as shown in the figure. In the register 4, only the m-th bit is "1", which shows the final data of the data array A0WAm. In accordance with the stages in which data are stored, "1" is set up in each stage of the control circuit 3. At that time, a signal EMP and a signal END are "0". When the final data Am of the data array is taken out, the signal END is turned to "1" because the corresponding flag bit is "1", so that the end of the data array can be detected and the succeeding data can be taken out.