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Title:
MANUFACTURE OF FIELD EFFECT TRANSISTOR
Document Type and Number:
Japanese Patent JPS605571
Kind Code:
A
Abstract:

PURPOSE: To improve the reproducibility and uniformity of characteristics by forming by self-aligning source, drain regions and a gate electrode.

CONSTITUTION: A reverse mesa projection 11 is formed by etching on a single crystal substrate by using a mask 83 used for both ion implanting and etching. Then, impurity ions are selectively implanted on a single crystal substrate 1 from above the projection 11, and a high impurity density region to become a source and drain region 2 is formed. Then, a single crystal substrate 1 is again etched, and the etching is advanced until the top of the projection 11 is removed. Thereafter, relatively low density impurity ions are implanted from above, and an operating region 3 is formed. The substrate 1 formed in this manner has a middle high locus 12 self-aligned to the relative position to the region 2. The relation of this relative position can be decided by the ion implanting angle at the time of forming the shape of the projection 11 and the region 2.


Inventors:
TATEMATSU MIKIO
FURUYAMA HIDETO
Application Number:
JP11279583A
Publication Date:
January 12, 1985
Filing Date:
June 24, 1983
Export Citation:
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Assignee:
TOSHIBA KK
International Classes:
H01L29/812; H01L21/265; H01L21/338; H01L29/417; H01L29/80; (IPC1-7): H01L29/80; H01L21/265; H01L21/28
Attorney, Agent or Firm:
Norio Ogo (1 outside)