PRINTED CIRCUIT BOARD HAVING EXCESS LINK AND METHOD OF PRODUCING SAME

Japanese Patent JPS609142

A

An integrated circuit is fabricated with some redundant capacity by forming potential electrically conducting links which can subsequently be made electrically when extra circuit capacity is required. Field oxide is grown on a silicon substrate and then a layer of polysilicon deposited over the oxide. At the redundancy sites where electrical connections may subsequently be made, an anti-reflective silicon nitride coating is deposited and photodefined. The areas of this coating are used as masks in order to diffuse dopant into the polysilicon at parts of the polysilicon laterally adjacent the redundancy sites. When later it is necessary to bring spare capacity into the circuit the complete circuit is scanned with a continuous wave laser. The laser melts the polysilicon under the nitride mask permitting the dopant to diffuse from the adjacent parts of the polysilicon and so form a conducting link. However under parts of the polysilicon not covered by an anti-reflective coating the polysilicon is not melted by the laser beam and so its conductivity remains unchanged. The fabrication process is self-aligned since the intrinsic or undoped region of the polysilicon is the same as the region which is melted. The method for making the electrical links does not require precise positioning and focussing of the laser beam as in known methods.

AIEIN DAGURASU KARUDAA
FUSEIN MOSUTAFUA NAGUIBU

JP11923084A

January 18, 1985

June 12, 1984

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NORTHERN TELECOM LTD

H01L27/04; H01L21/82; H01L21/822; H01L23/525; (IPC1-7): H01L21/82; H01L27/04

Kiyoaki Takita

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