PURPOSE: To improve the accuracy of equalization by inputting a delay-equalized signal to an amplitude equalizing circuit, and adjusting delay equalization and amplitude equalization independently.

CONSTITUTION: An input signal from an input terminal 1 is supplied to the delay equalization part 11 composed of a delay circuit group 2, an amplitude adjusting circuit group 3 and an adder 4 to perform delay equalization. This delayed signal is branched by a branching circuit 30; one is supplied to a synthesizing circuit 16 through a variable delay circuit 31. The other branched signal is supplied to the amplitude equalization part 12 composed of a delay circuit group 13, an amplitude adjusting circuit group 14, and an adder 15 to perform amplitude equalization. This delay-equalized signal is sent to the synthesizing circuit 16, where the signal is synthesized with the delay-equalized signal. Thus, the delay equalization and amplitude equalization are adjusted independently, so accurate equalization is performed.