PURPOSE: To normally perform the collection of erroneous data and error processing at the generation of errors by suppressing the functions of an error detecting means in a processing device or the status change of a sequence controlling part and then executing the error processing.

CONSTITUTION: Outputs from data registers 11a, 11b and an operation register 12 are inputted to error detecting means 16aW16c and, if an error is detected, erroneous information is set in a holding register 13. A sequence controlling part 15 starts a machine stop or error processing program in a microprocessor. The 1st means for an error generated in a controlling part 2 excites an erroneous information signal generating part 23 and the information signal suppresses any one or all of the error detecting means 16aW16c through a data bus 5. The 2nd means suppresses the status change of the sequence controlling part 15. Subsequently the contents of control data registers 21a, 21b and a status display register in the controlling device 2 are read out to execute the error processing.