PURPOSE: To prevent generation of spuriousness in an FM limiter amplifying circuit or the like, by using a balanced π type MOS capacitor constituted with two MOS type capacitors connected in parallel.
CONSTITUTION: The two MOS type capacitors 100, 200 are formed on a substrate 12, aluminum vapor-deposited layers 16a, 17b', and 16b, 17b are connected and led out as terminals A, B. The capacitor constituted in this way is the balanced π type capacitor comprising series capacitors 5a+5b and parallel capacitors 5a', 5b'. Thus, the generation of spuriousness is prevented much more in comparison with a conventional amplifier using an unbalanced capacitive load, in using the capacitor circuit as a capacitive load for the FM limiter amplifying circuit or the like.
WO/2003/077417 | METHODS AND APPARATUS FOR AUTOMATIC GAIN CONTROL |
JP4142059 | Integrator circuit |
JP48105835B | ||||
JP55072329B |
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