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Patent Searching and Data


Title:
AMPLIFIER
Document Type and Number:
Japanese Patent JPS5916409
Kind Code:
A
Abstract:

PURPOSE: To prevent generation of spuriousness in an FM limiter amplifying circuit or the like, by using a balanced π type MOS capacitor constituted with two MOS type capacitors connected in parallel.

CONSTITUTION: The two MOS type capacitors 100, 200 are formed on a substrate 12, aluminum vapor-deposited layers 16a, 17b', and 16b, 17b are connected and led out as terminals A, B. The capacitor constituted in this way is the balanced π type capacitor comprising series capacitors 5a+5b and parallel capacitors 5a', 5b'. Thus, the generation of spuriousness is prevented much more in comparison with a conventional amplifier using an unbalanced capacitive load, in using the capacitor circuit as a capacitive load for the FM limiter amplifying circuit or the like.


Inventors:
MIURA MASAMI
Application Number:
JP12616682A
Publication Date:
January 27, 1984
Filing Date:
July 20, 1982
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H03G11/00; H01L21/822; H01L27/04; H03G11/06; (IPC1-7): H03G11/00
Domestic Patent References:
JP48105835B
JP55072329B
Attorney, Agent or Firm:
Uchihara Shin