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Title:
PREPARATION OF SEMICONDUCTOR ROM
Document Type and Number:
Japanese Patent JPS58154259
Kind Code:
A
Abstract:

PURPOSE: To change an E-type MOS into a D-type by forming a gate oxide film and gate metal pattern on a semiconductor substrate surface, making thin said pattern in the region where the eyes of ROMs are to be formed and by changing a threshold voltage through implantation of ions.

CONSTITUTION: A thermal oxide film 12 is formed on a semiconductor substrate 11 and moreover a silicon nitride film 13 is formed. The boron is implanted to the area from where the film 13 has been removed and a channel stopper 15 is formed. A field oxide region 16 is then formed and the films 12, 13 are removed. A gate insulating film 17 consisting of SiO2 is thereafter formed and a polycrystalline silicon is grown thereon at the entire part thereof by doping P or As in a high concentration. Ions are implanted with a metal pattern 18 used as the mask and the source, drain diffused layers 19 are formed. The metal pattern 18 in the region where the eyes of POM are to be formed is made thinner, ion is implanted therethrough and thereby the E-type MOS is changed to the D-type.


Inventors:
MIZUNO SUMIO
KAWAMOTO KAZUNORI
FUJII TETSUO
Application Number:
JP3777882A
Publication Date:
September 13, 1983
Filing Date:
March 10, 1982
Export Citation:
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Assignee:
NIPPON DENSO CO
International Classes:
G11C17/00; G11C17/08; H01L21/8246; H01L27/112; H01L29/78; (IPC1-7): G11C17/00; H01L27/10; H01L29/78
Attorney, Agent or Firm:
Takehiko Suzue



 
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