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Patent Searching and Data


Title:
COLLATING CIRCUIT
Document Type and Number:
Japanese Patent JPS60125020
Kind Code:
A
Abstract:

PURPOSE: To detect all single faults with a limited number of input patterns by providing an input means capable of varying independently of inputs to a multi- input collating circuit.

CONSTITUTION: Three stages of inspection collating circuits 1 each having two couples of inputs are connected in series and a logical equation c=b*a1*a2*a3' holds. A logical value table in a figure shows the case of the input of only two kinds of pattern string, i.e. (a1', a2', a3')=(0, 1, 0), (1, 0, 1), and (b) may be 0 and 1 for the respective patterns (according to an independent input A), so four kinds of patterns can be inputted for two couples of inputs (b, a1', a2', a3'). If one of the two-couple-input self-inspection matching circuits 1 gets out of order, the circuit output is varied into an output (d) different from an expected value with one input among four different kinds of couple inputs, and this output (d) propagates to a circuit output t4 to make the output (c) coincident with the output (d) in non-sign space. Thus, the fault is detected.


Inventors:
MATSUOKA KOUJI
FUJIWARA EIJI
Application Number:
JP23268483A
Publication Date:
July 04, 1985
Filing Date:
December 12, 1983
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H03K19/21; (IPC1-7): H03K19/21
Attorney, Agent or Firm:
Koji Hoshino