Title:
高調波阻止ミキサを使用するトランシーバ
Document Type and Number:
Japanese Patent JP2005516519
Kind Code:
A
Abstract:
A wireless transceiver includes a transmitter having a harmonic rejection mixer and an RF output phase-locked loop in a two step up-conversion architecture, and a direct conversion receiver. The transmitter includes a local oscillator for producing a signal at a multiple of an intermediate frequency, a quadrature modulator harmonic rejection mixer responsive to the signal at the multiple of the intermediate frequency for modulating in-phase and quadrature-phase base-band signals to produce an intermediate frequency signal, a filter responsive to the intermediate frequency signal for producing a filtered intermediate frequency signal, and an RF output offset phase-locked loop responsive to the filtered intermediate frequency signal and the signal at the multiple of the intermediate frequency for producing an RF transmission signal. The harmonic rejection mixer reduces filtering requirements to facilitate a high level of circuit integration. The local oscillator may use a integer or fractional-N phase-locked loop.
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Inventors:
Sea, Andrew
Jaffy, James
Morenkov, Stephen
Suzabo, Sando
Jaffy, James
Morenkov, Stephen
Suzabo, Sando
Application Number:
JP2003565052A
Publication Date:
June 02, 2005
Filing Date:
January 27, 2003
Export Citation:
Assignee:
QUALCOMM INCORPORATED
International Classes:
H04B1/04; H03C3/09; H03C3/40; H03D7/18; H03L1/00; H03L3/00; H03L7/18; H04B1/40; (IPC1-7): H04B1/04
Attorney, Agent or Firm:
Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Yoshihiro Fukuhara
Sadao Muramatsu
Ryo Hashimoto