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Title:
TRANSMITTER-RECEIVER FOR IP PACKET
Document Type and Number:
Japanese Patent JP2004112192
Kind Code:
A
Abstract:

To provide a transmitter-receiver for IP packets for transmitting/receiving a video and audio signal through an IP network that eliminates a fact that the utilizing rate of a memory and a bus used by a network interface and a CPU decides the performance limit of the transmitter-receiver itself.

A memory having a plurality of input output ports (e.g. a dual port memory 104) or an FIFO memory divides congested data delivered through input/ output ports and a bus 102 for a memory. Further, a CPU 101 processes IP packets carrying the video and audio signal differently from the other IP packets. Moreover, utilizing an encoder or decoder 107 to decompose/generate the IP packets reduces the processing load imposed on the CPU 101 without using the CPU 101 for the purpose.


Inventors:
MITANI HIROSHI
HIGASHIDA MASAAKI
MORIOKA YOSHIHIRO
Application Number:
JP2002270216A
Publication Date:
April 08, 2004
Filing Date:
September 17, 2002
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F13/16; H04L12/70; H04L13/08; (IPC1-7): H04L13/08; G06F13/16; H04L12/56
Attorney, Agent or Firm:
Shiro Ogasawara