Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
VARIABLE RESISTANCE CIRCUIT
Document Type and Number:
Japanese Patent JP3167520
Kind Code:
B2
Abstract:

PURPOSE: To obtain a circuit with an excellent attenuation efficiency even in a high frequency region by providing a variable resistor whose input and output terminals are respectively connected and an auxiliary variable resistor whose resistance is a required resistance and whose both terminals are respectively connected to the variable resistor and ground, thereby controlling the resistance to a prescribed value.
CONSTITUTION: N-channel FET TR1 acting like a variable resistor is connected between an input terminal 1 and an output terminal 2, and a series circuit comprising an N-channel FET TR2 whose resistance is inversely proportional to the FET TR1 and a capacitor 22 is connected between a gate of the FET TR1 and ground. Then the circuit is controlled in such a way that the resistance of the FET TR2 is low when the resistance of the FET TR1 is high, and the resistance of the FET TR2 is high when the resistance of the FET TR1 is low through fixed high resistance resistors 12, 13. Thus, a leakage signal caused by a parasitic capacitance when the resistance of the FET TR1 is high is short- circuited, and the FET TR2 blocks the leakage when the resistance of the FET TR1 is low to obtain the variable resistance circuit with an excellent attenuation efficiency even in a high frequency region.


Inventors:
Tsutomu Takenaka
Application Number:
JP1379694A
Publication Date:
May 21, 2001
Filing Date:
February 07, 1994
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
Terra Tech Co., Ltd.
International Classes:
H01L27/04; H01L21/822; H01L29/66; H03H11/24; H03H11/46; (IPC1-7): H03H11/24; H01L21/822; H01L27/04; H01L29/66; H03H11/46
Domestic Patent References:
JP63245013A
Attorney, Agent or Firm:
Naotaka Ide