Title:
VOLTAGE-IMPRESSING DEVICE
Document Type and Number:
Japanese Patent JP3795698
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To prevent a load, such as the semiconductor integrated circuit element, etc., from being broken by a discharged current, when the charges charged in a stray capacity flow to the load in the case where a voltage is impressed upon the load from a voltage impressing device, which impresses the voltage upon the load and measures the DC characteristics of the load by measuring the current, etc., flowing to the load.
SOLUTION: A voltage-impressing device is constituted, in such a way that the device supplies a commercial power supply voltage to an AC/DC converter 22 and the converter 22 generates a desired DC voltage and supplies the voltage to a load 10 through first and second switches KL and KH, respectively connected to a common potential line LO and a hot potential line LH. In addition, a serial circuit of a resistor Rm and a third switch Km is connected in parallel with the first switch KL connected to the common potential line LO, and when the device impresses a voltage upon the load 10, the first switch KL and the second switch KH are successively controlled to turned-on states in this order.
Inventors:
Eiji Sannomaru
Application Number:
JP11317799A
Publication Date:
July 12, 2006
Filing Date:
April 21, 1999
Export Citation:
Assignee:
Advantest Corporation
International Classes:
H02M7/06; G05F1/10; H02M7/12; (IPC1-7): H02M7/06; G05F1/10
Domestic Patent References:
| JP8168250A |
Attorney, Agent or Firm:
Naoki Nakao
Yukio Nakamura
Taku Kusano
Minoru Inagaki
Yukio Nakamura
Taku Kusano
Minoru Inagaki