To sufficiently secure the non-superposition margin among word line signals by reducing the difference of driving speed between a word line driving circuit near a memory cell block selection part and a word line driving circuit distant from the part.

When a main line signal MWLn and a block selection signal BS1 are impressed in an auxiliary word line driving part SWD'n distant from a memory cell block, this auxiliary word line driving part is early enabled because this part has relatively a large size. Then, this part outputs a word line signal WL'n to a memory cell block. The resistance and a capacitance by the line of the block selection signal BS1 are the same as in the conventional manner. However, since a transistor included in a NAND gate 52 and receiving the block selection signal BS1 as an input is of relatively large size, the transistor is early enabled to reduce the difference of driving speed among word line driving circuit and it secures the non-superposition margin among signals.