Title:
ACCELERATOR OFFLOAD DEVICE, ACCELERATOR OFFLOAD METHOD, AND PROGRAM
Document Type and Number:
WIPO Patent Application WO/2023/243098
Kind Code:
A1
Abstract:
An accelerator offload device (100) comprises: a data processing amount acquisition unit (110) that acquires a current data processing amount when performing an offload target process and/or a predicted data processing amount; a computation destination determination unit (120) that determines whether to cause the CPU (11) to perform calculation or offload the calculation to the ACC (12) on the basis of the data processing amount of the APL (1), and changes the offload destination of a computation processing offload unit (130) when a change is necessary; and the computation processing offload unit (130) that receives a request for computation processing from the APL (1), stores data to be processed and a processing instruction in a shared memory, and causes the CPU (11) or the ACC (12) to execute a corresponding process.
Inventors:
NATORI KO (JP)
FUJIMOTO KEI (JP)
OTANI IKUO (JP)
SAITO SHOGO (JP)
FUJIMOTO KEI (JP)
OTANI IKUO (JP)
SAITO SHOGO (JP)
Application Number:
PCT/JP2022/024420
Publication Date:
December 21, 2023
Filing Date:
June 17, 2022
Export Citation:
Assignee:
NIPPON TELEGRAPH & TELEPHONE (JP)
International Classes:
G06F9/38
Foreign References:
| JP2015509622A | 2015-03-30 | |||
| JP2010244316A | 2010-10-28 | |||
| JP2011204209A | 2011-10-13 |
Other References:
OGATA YASUHIKO: "Proposal and evaluation of a FFT library that uses CPU and GPU together", IPSJ SIG TECHNICAL REPORTS, vol. 2007, no. 80, 3 August 2007 (2007-08-03), pages 13 - 18, XP093117640
Attorney, Agent or Firm:
ISONO INTERNATIONAL PATENT OFFICE, P.C. (JP)
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