The invention relates to a method and a device for labeling segments of an image, which contains a plurality of pixels. It further relates to a device for processing video data and a television device.

For many image-processing purposes, images are segmented into regions of similar colors. In video processing, for instance, segmented regions can then be tracked throughout a video sequence.

One step of known image segmentation methods is performing an algorithm known as "Growing 4-Connected Cores". The input to the "Growing 4-Connected Cores" algorithm is a level map. A level map holds a label for each pixel indicating how homogeneous, for instance in color, a given pixel and the pixels around the given pixel are. The labels can be numbers from a predetermined interval, such as the interval between 0 and 19, where a value of 19 indicates a maximum homogeneity. A given number is representative of a certain homogeneity level.

The labeling process of the "Growing 4-Connected Cores" algorithm can be performed on all homogeneity levels to produce a so-called "core map" for each homogeneity level.

In the following, an example of a core map will be explained in more detail with reference to Fig. 1. Fig. 1 shows a representation of a section of a core map 10 of an image for one homogeneity threshold level. For example, assume that Fig. 1 shows a core map for the homogeneity level 4. The core map is organized as a matrix of cells, each cell representing a pixel of an image to be processed.

The core map of Fig. 1 exhibits two cores 12 and 14, which have been accentuated by hatching the pixels belonging to a respective core. A core on a given homogeneity level contains all pixels, which have a homogeneity level equal to or higher than the current homogeneity level and are 4-connected to at least one pixel also having at least the current homogeneity level. As is well known in the art, a pixel is 4-connected if it has a connection to a neighboring pixel on one of its four sides. Neighbor pixels on the corners of the current pixel are not considered in 4-connectivity. A connection between pixels

exists if they both fulfill a given connectivity criterion, such as passing a homogeneity threshold value as in the present case.

Thus, the homogeneity level allocated to a core map is actually a lower threshold value of homogeneity. It will be referred to as "homogeneity threshold level" herein. In the present example, the homogeneity threshold level is 4. Therefore, the two cores 12 and 14 contain 4-connected pixels having a homogeneity level of 4 or higher.

In a core map, each core is given an individual label. In Fig. 1, all pixels belonging to core 12 are labeled "5". All pixels belonging to core 14 carry the label "8".

All further pixels carrying no label in the core map of Fig. 1 are either not 4- connected or have a homogeneity level of 3 or less. These pixels can be given a special background value (not shown) indicating that a respective pixel has no label at the homogeneity threshold level 4.

In summary, the output of the labeling process on a homogeneity threshold level is a core map containing one label for each pixel. The same pixel may have different labels in core maps of different homogeneity threshold levels.

Fig. 2 shows a coarse schematic flow diagram of known labeling algorithms. Three main process steps can be identified. In a step Sl an initial core labeling is performed, which is also referred to as pre-labeling herein. In this step, the pixel data are processed to obtain an initial core map for the current homogeneity threshold level. Due to the sequential nature of the pre-labeling process it does not generate the correct core labels when a current pixel of an image is processed for the first time. Two cores may be connected by pixels, which have not been processed when the current pixel has to be labeled. Thus, at the time of processing the current pixel belonging to one of these cores, the cores appear to be separate and will consequently receive different labels. It is only during later processing of the connecting pixels that the connection of the two cores is discovered. Such connected cores carrying different labels are said to be equivalent to each other. They are actually sections of one common core.

It is therefore necessary to mere such equivalent cores. The merging action consists of keeping an equivalence table for all core labels that were introduced. A sub-step of step 1 in known labeling algorithms is therefore the creation and processing of equivalence messages including the flattening of equivalence chains. This will be explained in more detail in the following.

When two cores are found to be equivalent, an equivalence message is created. A separate equivalence-finding finite-state machine (FSM) receives the equivalence message

and notes the higher of the two core labels in an equivalence table at an index corresponding to the higher core label. A table of equivalences thus contains entries of the type "core 2 = core 1". This entry to the table means that a core labeled 2 is equivalent to a core labeled 1. .

Since a core can be equivalent to multiple other cores, it is necessary to prevent losing equivalence entries in the pre-labeling process of step Sl . Such loss of equivalences would create an overly segmentation of the image. Therefore, such equivalence chains must be found by the equivalence-finding FSM in step Sl before creating the entry to the equivalence table.

For example, equivalence messages created during processing could be "core 2= core 1", "core 4 = core 2", and a later entry could be "core 6 = core 1". These equivalence messages imply that cores 1, 2, 4, and 6 are equivalent and should carry the same label, which according to the prior art is chosen to be the lowest of the labels of the equivalent cores. Therefore, the sub-step of step 1 of the "Growing 4-Connected-Cores" algorithm goes through the equivalence chains in order to assign a final common core label to two equivalent cores. Such equivalence-chain flattening algorithms are well known in the art.

In step S2 the equivalence table is processed to reflect the result of the equivalence-chain flattening performed during step Sl. The output of step 2 is an equivalence table containing the final core label equivalences. In the above example, the processed equivalence table would read at the entries of core 2, 4, and 6: "core 2 = core 1", "core 4 = core 1", and "core 6 = core 1".

At step S3, the final core labels are applied to the pixel data.

For many video applications, like motion estimation or calculation of depth maps from motion detected in a sequence of video images, a real-time labeling process is necessary. However, the sequential nature of the "Growing-4-Connected-Cores" algorithm makes it difficult to accelerate a hardware implementation. Sequential processing is required during step Sl because the assigned label of each pixel depends on the labels of the pixels above it and on its left. Further, the merging of two connected cores requires ascertaining and storing information about which cores are ultimately connected to each other in stepSl. Flattening of the equivalence table limits the speed of performing the initial core labeling in step Sl . On average, traversing an equivalence chain takes 2 to 3 read operations per core. Since two core numbers need to be looked up, a total 4 to 6 read operations is necessary plus one write operation to note down the result of the equivalence flattening algorithm.

GB 2310100A describes an image labeling system for 1 -bit-pixels, which is intended for real-time operation and based on 8-connected cores. A pre-labeling unit

allocates a label to each pixel of an image with the aid of a decision- logic unit adapted to detect and to deal with 17 possible constellations. Each constellation reflects a particular relation between the labels of the current pixel and those of four previously processed neighboring pixels. After detecting one of these pixel constellations for a current pixel, an allocated decision rule implemented in the decision- logic unit is applied to determine the label of the current pixel as a function of the labels previously assigned to the pixels, which are 8-connected to the current pixel.

The pre-labeling of GB 231010OA unit also generates equivalence messages for pixels, which have connecting pixels with different labels. Equivalence messages are sent to a message queue. The message queue comprises a First-In-First-Out (FIFO) memory. A processing unit uses the equivalence messages to construct a list of labels that correspond to the same object in the image. These lists serve to generate an equivalence table. The generation of the equivalence table from the equivalence messages stored in the message queue corresponds to the equivalence-processing sub-step of step Sl and to step S2 of Fig. 2. Finally, global labels are applied according to the equivalence table, corresponding to step S3 of Fig. 2.

A disadvantage of the labeling system of GB 231010OA is that the assignment of labels in the pre-labeling step requires distinguishing a large number of different cases in a decision logic unit, which implies a high processing complexity at the cost of increased processing time and power consumption.

It is therefore an object of the present invention to provide a method and a device for labeling segments of an image, which allows a faster processing of the image.

According to a first aspect of the invention the problem is solved by a device for labeling segments of an image containing a plurality of pixels. The device of the invention comprises a pre-labeling unit, which is adapted to ascertain for each current pixel whether it is 4-connected according to a predefined connectivity criterion to two pixels previously labeled with labels differing from each other. The pre-labeling unit is further adapted to generate for each such 4-connected pixel an equivalence entry to an equivalence list, the equivalence entry containing the two labels of the two neighboring pixels. The pre- labeling unit is iurthermore adapted to assign to each current pixel, which is 4-connected to at least one previously processed pixel, the label of a previously processed neighbor pixel, to which the current pixel is 4-connected and which has a predetermined neighboring position relative to the current pixel. The pre-labeling unit is adapted to perform these operations sequentially for all pixels of the image.

The device of the invention further comprises an equivalence-list maintenance unit, which is connected to the pre-labeling unit, and which is adapted to add an equivalence entry, which has been newly received, to the equivalence list only, if the equivalence entry is different from the equivalence entry, which was last added to the equivalence list. The device of the invention implements a modification of the initial core labeling step, i.e., step Sl of Fig. 2, to achieve a faster processing of the image. An important measure of the solution of the invention is to introduce a list of equivalence entries instead of an equivalence table. In an equivalence table the line index represents the core number while the actual table entry is the core label, which has been ascertained to be equivalent to the label of the current table index. In this data structure, each core can only be equivalent to one other core, requiring a complex and slow equivalence chain- flattening algorithm.

In contrast, according to the device of the invention, equivalence information is stored in the form of a list. This means that each entry to the equivalence list has two core labels. For comparison with the example of an equivalence table given earlier, a corresponding equivalence list could read:

1 2

2 4 1 6

This example shows that an individual core label can occur in more than one entry of the equivalence list, in contrast to the case of an equivalence table. Therefore, according to the invention, an equivalence chain- flattening algorithm is not necessary in the initial core-labeling step Sl (cf. Fig. 2). Such removal of equivalences can be postponed to step S2. Adding an entry to an equivalence list takes only a single write operation. In contrast, according to the prior art, traversing the equivalence chain of an equivalence table takes 2 to 3 reads per core. Since two core labels need to be looked up, a total of 4 to 6 read operations is necessary. Thus, the introduction of an equivalence list according to the invention accelerates the processing speed by reducing the number of read operations. While the use of a list of equivalence messages is known from GB 2310100 A, the method described there with respect to 8-connectivity of pixels is not practical in the case of 4-connectivity. For adding an equivalence entry to an equivalence list each time the two previously labeled pixels of pixels neighboring a current pixel have labels differing from each other can result in a very large amount of equivalence entries to be written, many of

which would be duplicates. This would be very inefficient, since a large memory would have to be introduced. It would also increase the processing amount considerably to check for each newly received equivalence entry whether it has been generated before for the current image. In the device of the invention, these problems are avoided by the introduction of an equivalence-list maintenance unit, which is adapted to add a newly received equivalence entry to the equivalence list only, if it is different from the equivalence entry last added to the equivalence list. The functionality of the equivalence-list maintenance unit is based on the perception of the present invention that many duplicates occur in order on a border of two neighboring cores. Where the pixels of an image are processed sequentially along a pixel line, most duplicates of equivalence messages are generated along horizontal borders of neighboring cores. By avoiding a repeated storage for this case of duplicate entries to the equivalence list, the number of duplicate equivalence entries in the equivalence list is limited very efficiently.

The device of the invention performs the first step of the "Growing 4- Connected Cores" algorithm about 4 to 6 times faster than prior-art algorithms in an average case. There is some extra cost associated with the solution of the invention, because in the equivalence list every entry contains two core numbers whereas in the prior-art the index of the equivalence table was used as one of the core labels. Assuming that a core label requires 16 bits, an entry to the equivalence list requires 32 bits. For comparison, an entry to an equivalence table only requires 16 bit. However, according to the invention, as simulations show, fewer entries have to be made than the number of cores, so the equivalence list can be made somewhat smaller. For cores, which are not equivalent to other cores do not appear in the equivalence list, while they must appear in a table according to the prior art, which therefore had to have as many entries as the maximum number of core labels that can be introduced.

The device of the invention will also be referred to as the labeling device of the invention. In the following, preferred embodiments of the labeling device of the invention will be described.

In a preferred embodiment the pre-labeling unit of the labeling device is further adapted to assign to each current pixel, which is not 4-connected to any previously processed pixel, a new label that has not been assigned to any previously processed pixel. This way, the labeling device of the invention detects a first pixel of a new core and generates a new label for this core.

In a preferred embodiment the equivalence-list maintenance unit of the labeling device of the invention comprises a last-entry memory that is adapted to hold the last stored entry to the equivalence list. The equivalence-list maintenance unit is in this embodiment preferably adapted to write an entry, which has been appended to the equivalence list, to the last-entry memory, thus overwriting a previous entry stored in the last- entry memory. For ensuring very fast access to the last-entry memory, the last-entry memory is preferably a register.

Preferably, the equivalence maintenance unit is generally adapted to generate, store in an equivalence memory and maintain an equivalence list, containing equivalence entries received from the pre-labeling unit.

In a further preferred embodiment of the invention the pre-labeling unit is adapted to assign to a current pixel, which caused an equivalence entry, the label of the last pixel that has been labeled before the current pixel.

For instance, in this embodiment the pre-labeling unit may process the image from a top pixel line to a bottom pixel line of the image, and process the pixels in each pixel line from left to right. In this example the pre-labeling unit is adapted to assign to a current pixel, which caused an equivalence entry, the label of the respective left neighbor pixel, which is 4-connected to the current pixel on the current homogeneity threshold level.

In known prior-art solutions the general rule is to assign the lower one of the two neighboring core labels, that is, the label having the lower value, to a current pixel in a merging situation. By changing this two always assigning the left pixel in a merging situation, the next pixel to the right has a high chance of resulting in the same merge action as the current pixel. Therefore, no new entry needs to be written to the equivalence list in that case. Simulation results indicate that only about 5 % of equivalence entries to the equivalence list are duplicates if this rule of always assigning the left pixel in a merging of two cores is applied.

In a preferred embodiment, the pre-labeling unit is adapted to ascertain 4- connectivity of a current pixel according to a predefined pixel-homogeneity criterion. In this embodiment, a current pixel is 4-connected if it fulfills the predefined pixel-homogeneity criterion and one of the neighbor pixels on the four sides of the current pixel fulfills the same pixel-homogeneity criterion, too. Many pixel-homogeneity criteria are known in the art. One example of a pixel-homogeneity criterion is that homogeneous pixels have the same or similar colors. Another example of a pixel-homogeneity criterion may for instance be defined by a lower threshold value of a homogeneity value, which is allocated to each pixel of an

image, so that pixels can only be 4-connected if their respective homogeneity values. The homogeneity value allocated to a current pixel may for example be indicative of the color homogeneity of the pixels on the four sides of a current pixel. Pixel homogeneity may be expressed by an integer or real number from a predefined interval, such as the interval between 0 and 19, representing one of a number of homogeneity levels.

Accordingly, a further embodiment of the labeling device of the invention comprises an input unit, which is adapted to receive pixel homogeneity- level data representing one of a preset number of homogeneity levels allocated to a respective pixel, wherein the pre-labeling unit is adapted to ascertain whether a current pixel is 4-connected on a preset homogeneity-threshold level, in that it has a homogeneity level higher than or equal to the preset homogeneity-threshold level.

Pixel homogeneity- level data is typically taken from a homogeneity- level map of the image provided by a previous step in a respective image-processing algorithm. Such level mapping is well known to the person skilled in the art. Preferably, the pre-labeling unit is adapted ascertain 4-connectivity of the pixels of the image on a multitude of homogeneity-threshold levels. The equivalence maintenance unit is in this case adapted to generate, store in an equivalence memory and maintain an equivalence list, containing equivalence entries received from the pre-labeling unit for each homogeneity-threshold level. In another embodiment, which can be combined with each of the previously described embodiments, the labeling device of the invention further comprises a previous- pixel memory and a previous-line memory, which each are connected with the pre-labeling unit, and wherein the previous-pixel memory is adapted to store the labels for all homogeneity threshold levels of a respective last-processed neighbor pixel, and the top-line memory is adapted to store the labels for all homogeneity threshold levels of all pixels of a respective last-processed neighbor line of pixels.

In this embodiment, the pre-labeling unit is adapted to push the current first output to a previous-pixel stack stored in the previous-pixel memory and to a respective previous-line stack of a multitude of previous-line stacks, the number of previous-line stacks corresponding to the number of pixels in a pixel line of the image. As is well known in the art, a stack is a data structure of a "Last-In-First-Out" (LIFO)-type.

In a further embodiment, the equivalence memory contains a number of memory banks, the number of memory banks corresponding to the number of homogeneity threshold levels.

Another embodiment of the labeling device of the invention further comprises a parent-child memory connected to the pre-labeling unit, which is adapted to store parent- child entries representative of a parent-child relationship between different labels of a pixel on different homogeneity threshold levels. As an example, if a core has a label on level 4 and another one on level 5, then in the parent-child list the number on level 5 is noted to be the "parent" of the one at level 4. It is noted that the additional features of the embodiments described above can be combined with each other to form further embodiments, unless otherwise noted.

According to a second aspect of the invention a device for processing video data is provided, which are represented by a sequence of images. The device of the second aspect of the invention comprises a device for labeling segments of an image according to one of the embodiments of the device of the first aspect of the invention.

The labeling device of the invention is in different embodiments contained in video processing devices, which are adapted to process the video data by compressing the video data, or by converting the video data into second video data representing a sequence of three-dimensional images (2D-to-3D converters), or by de-interlacing the video data, or by subjecting the video data to a known picture improvement algorithm.

The device for labeling segments of an image and the video processing devices are preferably formed in hardware, as integrated circuits on a chip.

The video-processing device of the second aspect of the invention or the image-labeling device of the first aspect of the invention, or one of their respective embodiments, can be used in television devices.

According to a third aspect of the invention, a method for labeling objects in an image containing a plurality of pixels having pixel coordinate data and pixel intensity data is provided. The method of the second aspect of the invention comprises the steps of a) ascertaining for each current pixel whether it is 4-connected to two pixels previously labeled with labels differing from each other, and generating for each such 4- connected pixel an equivalence entry to an equivalence list, the equivalence entry containing the two labels of the two neighboring pixels, b) assigning to each current pixel, which is 4-connected to at least one previously processed pixel, the label of a previously processed neighbor pixel, to which the current pixel

is 4-connected and which has a predetermined neighboring position relative to the current pixel, and c) adding only a new equivalence entry to the equivalence list, which is different from the equivalence entry last added to the equivalence list. The advantages of the method of the second aspect of the invention correspond to those explained in the context of the labeling device of the invention. In the following, preferred embodiments of the method will be described.

One embodiment further comprises a step of assigning to each current pixel, which is not 4-connected to any previously processed pixel, a new label that has not been assigned to any previously processed pixel.

In another embodiment, the assigning step for a current pixel, which caused the generation of an equivalence entry, comprises assigning the label of the last pixel, which has been labeled before the current pixel.

In this embodiment, the image is preferably processed from a top pixel line to a bottom pixel line, and the pixels in each pixel line are processed from left to right, and wherein the assignment step for a current pixel, which caused an equivalence entry, comprises assigning to the current pixel the label of the respective left neighbor pixel, to which the current pixel is 4-connected.

In a further embodiment a label to a current pixel is pushed to a previous-pixel stack stored in the previous-pixel memory and to a respective previous-line stack of a multitude of previous-line stacks, the number of previous-line stacks corresponding to the number of pixels in a pixel line of the image.

A further embodiment comprises a step of ascertaining 4-connectivity of a current pixel according to a predefined pixel-homogeneity criterion. Another embodiment comprises the steps of providing pixel homogeneity- level data for each pixel of the image, and ascertaining whether a current pixel is 4-connected on a preset homogeneity-threshold level. Preferably, 4-connectivity of the pixels of the image is in this embodiment ascertained on a multitude of homogeneity-threshold levels.

Another preferred embodiment of the invention further comprises a step of ascertaining and storing parent-child relationships between different labels of a core on different homogeneity threshold levels.

The advantages of the embodiments given in the proceeding paragraphs correspond to those of preferred embodiments of the labeling device of the invention.

In the following further preferred embodiments of the invention will be described with reference to the figures.

Fig. 1 shows a representation of a section of a core map of an image for one homogeneity threshold level.

Fig. 2 shows a core schematic flow diagram of known labeling algorithms.

Fig. 3 shows a block diagram of an embodiment of a labeling device according to the invention.

Fig. 4 shows a flow diagram of a pre-labeling algorithm performed in the pre- labeling unit of Fig. 3.

Fig. 5 shows a flow diagram of an algorithm performed by the equivalence-list maintenance unit of the labeling device of Fig. 3.

In the following, an embodiment of an image labeling device of the invention will be described with reference to Fig. 3 shows a block diagram of the labeling device. For reasons of simplicity of the following description, the block diagram contains only those sections of the image-labeling device, which are important with respect to the present invention. The image-labeling device 20 of Fig. 3 has a pre-labeling unit 22 receiving as a first input 24 a homogeneity level map. The homogeneity level map is received sequentially, pixel-by-pixel, in the form of a number between 0 and 19 for each pixel, corresponding to a homogeneity level of the respective current pixel. The current pixel can be identified by matrix coordinates. For the present example it is assumed that the image to be processed is an image of the known CIF (Common Intermediate Format)-data format, containing 352 x 288 pixels. Of course, other types of image data files can be subjected to the labeling performed by the device of the present embodiment.

Pre-labeling unit 22 has an output 22b for communicating an ascertained core label to a left-pixel stack 26. Left-pixel stack 26 contains the core labels assigned to the last processed pixel on all homogeneity levels. It is continuously updated with the current output of the pre-labeling unit 22 for the current pixel so that after processing all homogeneity levels for the current pixel, left-pixel stack 26 contains the labels of the current pixel for all homogeneity levels. For the present embodiment it is assumed that pixel processing is

performed from the top line to the bottom line of the pixel matrix, and in each pixel line from left to right.

Pre-labeling unit 22 is further connected to a top-pixel- line memory in the form of a random access memory (RAM) 27 through output 22b. RAM 27 contains 352 top stacks, one top stack for each pixel of the previously processed pixel line, which is the top pixel line of the currently processed pixel line in the present case. Again, for a different data format than the CIF data format, RAM 27 would contain a respective other appropriate number of top stacks. During processing of a current pixel only one top stack of RAM 27 is modified, the particular top stack corresponding to the row of the current pixel. Pre-labeling unit 22 is further connected to an equivalence-list maintenance unit 28 through an output 22a for providing equivalence entries to equivalence-list maintenance unit 28. Equivalence-list maintenance unit 28 appends equivalence entries to equivalence lists it generates, stores and maintains in an equivalence memory 30. Equivalence memory 30 comprises a memory bank for each homogeneity level, as indicated by memory banks 30a, 30b and 30c. It is noted that this is just a schematic representation of the memory-bank-structure of equivalence memory 30, and not an indication of the number of memory banks or homogeneity levels used in the present embodiment.

Equivalence-list maintenance unit 28 is further connected to a last-entry memory 32. Last-entry memory 32 has an appropriate size to hold the last equivalence entry stored to an equivalence memory bank at the current homogeneity level. Preferably, last- entry memory 32 is a register, thus ensuring very fast access.

A parent-child memory 34 is connected to output 22b of pre-labeling unit 22. Parent-child memory 34 stores parent-child entries representative of a parent-child relationship between different labels of a pixel on different homogeneity threshold levels. As an example, if a core has a label on level 4 and another one on level 5, then in the parent- child list the number on level 5 is noted to be the "parent" of the one at level 4.

Finally, a gate circuit 36 is connected to the output 22b of pre-labeling unit 22 and gated by the homogeneity level data provided to input 24.

Next, the operation of the labeling device of Fig. 2 is described with reference to Figs. 4 and 5. Fig. 4 shows a flow diagram of an algorithm performed by pre-labeling unit 22. The pre-labeling algorithm starts at a step SlO. At a step S12 the processing switches to the next pixel in order. As mentioned earlier, processing in a pixel line proceeds from left to right. After the last pixel of a pixel line has been processed, the processing continues with the left-most pixel of the following line, and so on. The processing of a pixel starts at the lowest

homogeneity level. Step S 14, at which the current homogeneity level is incremented, is skipped for the pre-labeling cycle on the lowest homogeneity level. At step Sl 6 the obtained pixel homogeneity level for the current pixel is compared to the currently set homogeneity threshold level. If the pixel homogeneity level of the current pixel is smaller than the current homogeneity threshold level, a background label is assigned to the current pixel in step S 18.

If, however, the pixel homogeneity level of the current pixel is higher than that currently processed, the algorithm proceeds to step S20 and checks whether the current pixel is 4-connected on the current homogeneity threshold level. If the current pixel is not for 4- connected, a next available core label is assigned to the current pixel at step S22, before the algorithm branches back to step S 14 to increment the current homogeneity threshold level.

If the current pixel is 4-connected on the current homogeneity threshold level, the algorithm proceeds to check at step S24 whether the core labels assigned to the left pixel and the top pixel of the current pixel are different from each other. If they are equal, the pre- labeling unit 22 proceeds to assign the common label of the top and left pixels also to the current pixel at step S26. If the labels of the top and left pixels are different from each other, the pre-labeling unit 22 creates an equivalence entry to be provided at output 22b. It then continues to assign the label of the left pixel to the current pixel. This assignment differs from that usually performed in the prior art. According to the prior art, it is always the smallest label of equivalent cores, which is assigned. By changing this to always assigning the left pixel in a merge situation, the next pixel to the right, which is processed up to the current pixel will have a high chance of resulting in the same merge action as the current pixel. Therefore, no new entry will have to be written to the equivalence list in that case. Simulation results indicate that only 5 % of the equivalence entries using this mechanism are duplicates. After performing step S26 pre-labeling unit 22 checks whether the maximum homogeneity level (19 in the present example) has been reached. If not, the algorithm switches back to step S14 to increment the current homogeneity level. If yes, pre-labeling unit 22 checks whether the last pixel of the image has been processed. If not, the current homogeneity level is reset at step S34 to be ready for processing the next pixel and continuing with step S12. If the last pixel has been processed, the algorithm ends at step S36. Fig. 4 shows an algorithm performed by the equivalence-list maintenance unit 28. The equivalence-list maintenance algorithm starts at step S40. With step S42 the algorithm switches to the processing of the next pixel. Step S44 serves to increment the current homogeneity threshold level. This step is skipped for the lowest homogeneity

threshold level. At step S46 the reception of an equivalence message is monitored. After an equivalence entry has been received, the equivalence-list maintenance unit checks at step S48, whether the received equivalence entry is identical to the last stored equivalence entry. If this is the case, the received equivalence entry is discarded at step S50. If this is not the case, the received equivalence entry is appended to the equivalence list of the current homogeneity level at step S52.

At step S54, the equivalence-list maintenance unit checks whether the maximum homogeneity threshold level has been reached. If not, the algorithm branches back to step S44 to increment the current homogeneity level. If the maximum homogeneity threshold level has been reached, the equivalence-list maintenance unit checks whether the last pixel has been processed. If not, the algorithm branches to step S58 and resets the current homogeneity threshold level to the lowest value. If the last pixel has been processed, the algorithm ends at step S60.