Title:
AMPLIFICATION CIRCUIT, IMAGING DEVICE, AND METHOD FOR CONTROLLING AMPLIFICATION CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2019/171686
Kind Code:
A1
Abstract:
Provided is an amplification circuit, wherein a deterioration in image quality due to a gain variation is suppressed. This amplification circuit is provided with an amplification transistor, a cascode transistor, and a control circuit. The amplification transistor amplifies an input signal. The cascode transistor supplies a substantially constant drain current to a reference potential line of a prescribed reference potential through the amplification transistor when a drain-source voltage between a drain and a source is higher than a prescribed voltage. In addition, the control circuit controls the drain-source voltage to a value higher than the prescribed voltage when initialization is instructed.
Inventors:
WATANABE SHINICHI (JP)
OTANI TAKEHIRO (JP)
OTANI TAKEHIRO (JP)
Application Number:
PCT/JP2018/044525
Publication Date:
September 12, 2019
Filing Date:
December 04, 2018
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H04N5/378; H01L27/146; H03F3/187; H04N5/374
Foreign References:
| JP2011029726A | 2011-02-10 | |||
| JP2016504894A | 2016-02-12 | |||
| JP2016171466A | 2016-09-23 |
Attorney, Agent or Firm:
MARUSHIMA, Toshikazu (JP)
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