Title:
AMPLIFIER CIRCUIT AND DRIVER CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2022/018824
Kind Code:
A1
Abstract:
An amplifier circuit comprises a variable degeneration circuit (1) connected to emitter terminals of transistors (Q1, Q2), and a variable negative capacitance circuit (2) connected to differential output signal terminals (Voutp, Voutn). The variable degeneration circuit (1) comprises a variable capacitor (C1) and a resistor (R3). The variable negative capacitance circuit (2) consists of transistors (Q7, Q8), a capacitor (C2), and variable current sources (IS3, IS4).
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Inventors:
JO TERUO (JP)
NAGATANI MUNEHIKO (JP)
NOSAKA HIDEYUKI (JP)
NAGATANI MUNEHIKO (JP)
NOSAKA HIDEYUKI (JP)
Application Number:
PCT/JP2020/028254
Publication Date:
January 27, 2022
Filing Date:
July 21, 2020
Export Citation:
Assignee:
NIPPON TELEGRAPH & TELEPHONE (JP)
International Classes:
H03F1/42; H03F1/32; H03F3/45
Foreign References:
JP2005073234A | 2005-03-17 | |||
JPH098565A | 1997-01-10 | |||
JP2018533890A | 2018-11-15 | |||
JPH0514079A | 1993-01-22 | |||
US4868421A | 1989-09-19 | |||
US20140253236A1 | 2014-09-11 | |||
US20180083584A1 | 2018-03-22 | |||
US20130215954A1 | 2013-08-22 |
Attorney, Agent or Firm:
YAMAKAWA, Shigeki et al. (JP)
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