FIELD OF INVENTION

The present invention generally relates to the field of electronic packaging and in particular to the packaging of optoelectronic components, modules and devices, e.g. Light Emitting Devices (LED), ultra-violet LEDs, white light LEDs, Superluminescent LEDs (SLED), Laser Diodes (LD), semiconductor photo detectors or photovoltaic devices. More particularly, embodiments of the present invention include multifunctional ultra-thin protective layers used for assembly level encapsulation (ALE), and having applications e.g. in LED light engine modules.

BACKGROUND OF THE INVENTION

Electronic or optoelectronic components must be protected from environment to prevent detrimental effects due to humidity, oxygen and corrosion due to ions and non-neutral substances. Different failure modes terminate component's functionality abruptly or by gradually degrading performance. The root causes of the failure modes can be roughly divided into internal and external ones. Internal ones refer to e.g. material defects, electromigration, material diffusion inside semiconductor devices, and e.g. design related failures. External ones are induced by environmental stresses that alone cause failures or trigger internal ones to develop up-to a point of failure.

With properly designed and manufactured packaging it is possible to reduce the effect of environment and enhance the component's reliability. Hermetic sealing is a good choice to improve reliability of electronic and optoelectronic components and prevent their premature end-of-life. Without hermetic protection to external stresses the background defects can develop and cause a premature failure originating typically from chip attach, wire bonding, wire bonding joints, chip's metal-semiconductor contact, or chip's top surface passivation. Hermetic sealing can substantially increase the mean time to failure as typical failure mechanisms are related to moisture leaking into the package and corroding the contacts or active areas e.g. the facets of the laser diodes.

External stress is caused for example by oxygen, water vapor, corrosive gases, ions and chemically active radical groups attacking the package surfaces. External stress can cause e.g. mechanical deformation through absorption and desorption of humidity, change in electrical circuitry, galvanic corrosion, de lamination, and oxidation of metal surfaces. For example humidity can chemically attack aluminum based top electrode contact pads, breaking the electrical connection between the wire bonding and the contact pad.

Semiconductor dies have normally a top surface layer, typically a thin nitride or oxide thin film that passivates the die electrically but also acts as a first buffer against corrosion due to environment. However, such passivation thin films are grown on wafer level prior the die singulation step. After dies are separated, the dies' vertical sidewalls become exposed to air and corrosive oxygen, and harmful compounds in the air. Furthermore, such chip's top surface passivation layers are open on the electrical contact pads, exposing these areas directly to stress from environment.

US 2007/0215998 discloses a LED package where a LED is attached to a substrate. A protective layer, disposed by plasma chemical vapor deposition surrounds the chip (the LED), the upper side of the substrate and electrically conductive humps. The protective layer consists of several sub-layers which have different refractive index. However, Dl does not disclose any protective layer consisting of sub-layers with different electrical conductivity.

US 2012/0326178 concerns an optoelectronic component comprising a semiconductor protected by a sealing material applied by atomic layer deposition.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide an encapsulated optoelectronic component. The encapsulation is introduced at assembly level to provide an optically transparent hermetical sealing layer and electrically insulating layer on all surfaces of the said component. The encapsulation, which is in direct contact with the surface of the component, provides a zero cavity structure.

It is an aspect of certain embodiments to provide an optoelectronic component comprising; a substrate, at least one light emitter device mounted on the substrate, and electrical contacts, with all surfaces coated with the protective layer. The substrate material can be ceramic, but is not limited to, e.g. Alumina (AI ₂ O ₃ ) or Aluminum Nitride (A1N). The substrate can be semiconductor material, but is not limited to, e.g. Silicon. The substrate material can be a typical printed circuit board material, but is not limited to, e.g. FR4, FR5, or epoxy laminate material.

The protective layer can be a material layer deposited with ALD or other similar means. The protective layer can be a multi-layer coating formed of two or more materials, such as AI ₂ O ₃ and Si02.

The protective layer's function is to provide hermetic sealing of all surfaces. The protective layer is deposited with a conformal coating process so that vertical sidewalls, edges, and shadowed areas are covered. The protective layer is formed at least on the front surface of the said component. According to certain embodiments the protective layer could be deposited on all surfaces of the component including the back side of the substrate and substrate's vertical sidewalls.

According to certain embodiments the protective layer could be deposited on top of mechanical package and transparent covering.

The protective layer is physically in contact with the active optical chips, and electrical parts, so that no cavity is formed between component and protective layer.

Embodiments of the present invention aim to solve issues associated with multichip modules and their hermetic sealing in a cost effective way. A common problem in packaging is that the layouts and dimensions of the units or chips to be packaged are changing due to rapid technical advancement and process changes, as in the field of LED technology. A flexible packaging approach is thus required that can accommodate frequently changing units without being modified despite changes in the actual LED processing or LED chips. An approach that is cost effective and, for example, which does not apply fixed mask sets is desired. The Atomic Layer Deposition (ALD) technique is well suited for this task. The ALD method can be applied on any 3D geometry and packaging material. ALD offers wide selection of materials to choose most suitable to form the said protective layer. The flexibility of the present invention has a substantial advantage over other packaging methods such as WLP.

It is a further object of the present invention to provide a method for manufacturing a hermetically sealed optoelectronic component according to the present disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 shows schematic cross-section of optoelectronic component with a substrate, a semiconductor die with electrical contact pad layer on top of surface of the die, die attach layer, electrical conductive layer on top surface of the substrate, and a wire bond to form electrical contact between the die and the electrical conductive layers.

Figure 2 shows schematic cross-section of optoelectronic component with a substrate, a semiconductor die with electrical contact pad layer on top of surface of the die, die attach layer, electrical conductive layer on top surface of the substrate, a wire bonding to form electrical contact between the die and the electrical conductive layers, and a protective layer covering the component surface excluding the back side of the substrate.

Figure 3 shows assembly flow for a typical component comprising a step to form the said protective layer. EMBODIMENTS

In the present context, the following terms are interchangeably used:

- "die" and "chip"; and - "protection layer", "encapsulation", "coating" and "barrier layer".

The verbs "to comprise" and "to include" are used in this document as open limitations that neither exclude nor require the existence of also un-recited features. The features recited in dependent claims are mutually freely combinable unless otherwise explicitly stated. Furthermore, it is to be understood that the use of "a" or "an", i.e. a singular form, throughout this document does not exclude a plurality.

The present invention discloses means to provide a protective layer after or during the assembly phase to improve the component's reliability. In order to protect all surfaces susceptible to environmental stresses, the protective layer is deposited after the basic assembly steps have been completed including the die separation, die attachment to substrate and wire bonding steps. The protective layer is made as a final step of the assembly, or just prior a mechanical enclosure is done. After the protective layer has been deposited, only the contact areas or the soldering pads for a printed circuit board assembly are left un-protected.

Such protective layers are ultra-thin optically transparent, conformal and uniform in nature. They provide a moisture resistance and improved electrical insulation with a typical application in LED light engine modules.

Referring to Figure 3 :

For example in case of a LED package comprising of a semiconductor die made of III-V semiconductor material mounted with conductive adhesive on an alumina substrate having on its top surface electrically conductive tracks made of silver alloy, and copper wire bonding to form electrical contacts between the semiconductor die and the electrical layer of the substrate.

After the die attach and wire bonding the assembled component can be coated with a protective layer formed of two dielectric materials of 10 nm of AI ₂ O ₃ and 5 nm of Si0 ₂ and these sub-layers could be deposited post-assembly e.g. with an atomic layer deposition method. Such a protection layer would be optically transparent and innocuous. The thickness of the protection layer can be optimized for the transmission at the said wavelength in interest. For example one quarter wavelength thick anti-reflection coating for an emission wavelength of 405 nm would be (405 nm/4/1.8) ~ 59 nm.

According to one embodiment of the present invention, a method of making a solid state light emitting and/or light detecting device, comprises the steps of:

- providing a first substrate;

- providing on the first substrate a plurality of solid state light emitting and/or light detecting chips;

- wire bonding the solid state chips to the first substrate;

- providing a conformal sealing layer to the solid state chips, wire bonds and any exposed first substrate between the solid state chips;

- providing a second substrate that is transmissive to the wavelength of light to be emitted and/or detected by the solid state chips; and

- providing a sealing layer between the first and second substrates and bonding the first and second substrates together so as to seal the solid state chips therebetween.

In one embodiment, the protective layer comprises at least one material selected from the group of oxide materials consisting of A1 ₂ 0 ₃ , Ti0 ₂ , ZnO, Hf0 ₂ , HfSiO, Si0 ₂ , MgO, Ta ₂ 0 ₅ , Zr0 ₂ .

In another embodiment, the protective layer comprises at least one material selected from the group of nitride materials consisting of A1N, HfN, SiNx, Si ₃ N ₄ , TaN, Ti .

In a third embodiment, the protective layer consists of electrically conductive material of Indium Tin Oxide.

The protective layer manufacturing with the atomic layer deposition can take place at relatively low temperature. A high quality A1 ₂ 0 ₃ layer can be grown at 120 to 150 °C. Low temperatures are often preferred as typical electronic packaging materials can withstand only 150 °C. A plasma-assisted ALD can be used for depositing low- temperature silicon dioxide as a top sub-layer at temperature of 150 °C. Alternatively, it has been also proposed to use a low temperature thermal ALD process can be used for depositing a high quality silicon dioxide.

As the protection layer deposition takes place after the assembly i.e. the semiconductor die has been attached to the substrate and electrical connections have been made by wire bonding, all surfaces including die attach layer and wire bonding become protected as well and improve the reliability of the component. The substrate or module has typically electrical contact pads used to make the connections to an external circuitry in the printed circuit board assembly phase. Such electrical contact pads on the substrate can be selectively protected during the deposition of the protective layer with e.g. a Kapton tape, which can be removed after the deposition of the protective layer.

Described herein is a hermetically sealed optoelectronic component. According to an embodiment, there are optoelectronic components comprising; a substrate, at least one optoelectronic chip bonded, soldered or glued on the substrate, an electrically conductive track on the substrate, and a wire bonding making electrical connection from the said chip to electrical conductive track on the top surface of the substrate,.

Examples of optoelectronic components are Light Emitting Diode (LED) components, Laser Diode (LD) components, Superluminescent LEDs (SLED), and other non-emitting types of components such as semiconductor detectors or imaging arrays. Light emitter components according to the present invention should not be limited to those emitting visible light but also include other forms of electromagnetic radiation. Further examples of light emitter components include those which comprises an In-, Ga-, A1-, and/or N- containing compound, for instance an InGaN or AlGaN diode.

In one embodiment, the present invention comprises a component formed of a substrate, semiconductor chip(s), electrical contact wire(s), electrical contact layer(s), electrically conductive track(s), and a protective layer, which is a conformal layer forming a uniform coating on the said component's surface. The protective layer is further hermetic and optically transparent. Preferably the protective layer comprises sub-layers of two or more different materials, wherein one sub- layer is electrically conductive in order to avoid charge accumulation in the coating. None of the above-mentioned references discloses any component or solid state device based on such a component, where the component has a protective layer in which one sublayer is electrically conductive in order to avoid charge accumulation in the coating.

Optical performance

In some embodiments of the present invention, the protective coating acts also as a functional layer to improve optical performance e.g. it can act as an anti-reflection coating, or provide optimized transmission of the electromagnetic radiation in certain wavelength in interest.

In another embodiment the protective layer functions as an optical layer providing means to create selective or custom reflection or transmission bands at a wavelength in interest. Such a protective layer could be formed of several alternating high refractive index and low refractive index materials. Thus the said protection layer provides means to optimize e.g. sensor sensitivity for a specified wavelength range.

Electrical insulation

Carbonization of materials within the component package can lead to accumulation of materials on top of the active surfaces, possibly causing undesired conductive paths causing leakage currents and short-circuit failures. Typically electrical contacts are made with wire bonding, which have non-insulated metal surfaces. Also the conductive paths on top surface of the substrates are non-insulated. Both of these are susceptible to leakage currents and short-circuit type failures. If protection layer material is dielectric the said passivation layer acts as electrical insulation layer formed on all electrical conductors prohibiting unwanted current paths and thus improves electrical performance and reliability.

In one embodiment, the protective layer has a sheet resistance lower than 1000 ohm, or preferably, lower than 100 ohm, or even more preferably lower than 10 ohm. The said protective layer that forms conformal coating around wire bonding would enable use of other materials than Au and leading to a more economical component.

Humidity absorbed on the component's surface can cause leakage currents and even cause short circuits. Thus a dielectric protective layer forming uniform insulation layer on all surfaces protects device from such electrical failures.

Furthermore the said dielectric protective layer acting would prevent galvanic corrosion mechanism to erode metallic surfaces.

A conformal passivation layer manufactured post module assembly provides convenient way to passivate all package surfaces susceptible to degradation under corrosive environment. In case of porous package surfaces it is likely that humidity absorbed causes deformation and stress leading to early failure. A conformal passivation layer provides means to prevent absorption of humidity inside porous surfaces.

In some embodiment of this invention the protective layer can be made hydrophobic to further increase the resistance to humidity. The protective layer typically has a water vapor transmission rate lower than lxl 0 ^"2 g/m ² /day, or preferably lower than lxlO ³ g/m ² /day, as measured at 25 °C, and at 50% relative humidity.

The protective layer typically has an oxygen transmission rate lower than lxl 0 ^"2 cm ³ /m ² /atm/day, or preferably lower than lxlO ^"3 cm3/m ² /atm/day.

It is foreseen that in some applications it is beneficial to have the said protective layer comprise conductive sub-layers to enable electrical functions. For example to avoid charge accumulation in the coating, an Indium Tin Oxide (ITO) sub-layer could be used as part of the protective layer. Barrier against oxidation

Typically used materials Ag, Al, Cu suffer oxidation. Commonly used reflector materials in LED packages are Ag or Ag based alloys. In another embodiment of the disclosed invention the protection layer covers the package surfaces coated with reflective thin films comprising Ag or Al based alloys. These alloys are susceptible to tarnishing and easily lose their reflectivity due to oxidation if applied without appropriate protective layer. The said protective layer shields such reflector layers from oxidation and lengthens the life-time of the LED.

Manufacturing

The said protective layer can be manufactured with a wide range of standard deposition methods applied in the semiconductor industry. Such standard methods include for example atomic layer deposition, plasma enhanced chemical vapor deposition, and sputtering. As it is often a requirement to have a conformal layer to protect shadowed areas, the ALD is the most preferred manufacturing method. A thermal, plasma-assisted or spatial ALD can be used for manufacturing the layers, or any combination of those. The structure of the said protective layer is such that it can be processed with a one loading step providing economical solution for the encapsulation.

Turning now to Figures 1 and 2:

Figure 1 shows an example of an optoelectronic component 100. The component has a substrate 101 having one chip 105 mounted on the substrate. The chip is solder or adhesive mounted on the substrate. A thin material layer 102 of solder or adhesive is between chip and substrate. The chip and substrate both have electrical contact layers 104,110 on top surfaces. The chip is electrically connected from a chip's bonding pad 107 with a wire bonding 108 to the substrate's electrical contact pad 110.

Figure 2 shows an example of an optoelectronic component 200 with a protective conformal coating layer 211 forming uniform and homogeneous hermetical seal covering all surfaces of the component. The other components 201 to 210 are analogous to the ones mentioned above in connection to optoelectronic component 100.

REFERENCE SIGNS LIST

101 substrate

102 solder/adhesive material layer on top of electrical contact layer on substrate's surface

103 chip vertical edge

104 electrical contact layer on top surface of the chip

105 chip

106 top surface of the chip

107 wire bonding bump on top of electrical contact layer on chip's top surface

108 bonding wire

109 wire bonding bump on top of electrical contact layer on substrate's surface

110 electrical contact layer on substrate's surface

201 substrate

202 contact material layer on top of electrical contact layer on substrate's top surface

203 chip vertical edge

204 electrical contact layer on top surface of the chip

205 chip

206 top surface of the chip

207 wire bonding bump on top of electrical contact layer on chip's top surface

208 bonding wire

209 wire bonding bump on top of electrical contact layer on substrate's surface

210 electrical contact layer on substrate ^' s top surface

211 conformal protection layer

301 Wafer Cutting - Die Singulation

302 Die Attachment to Substrate

303 Electrical Contact Making - Wire Bonding

304 Protective Layer Deposition

305 Mechanical Protection

LIST OF REFERENCES

US 2007/0215998

US 2012/0326178