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Title:
BIAS CIRCUIT AND SIGNAL PROCESSING CIRCUIT PROVIDED WITH SAME
Document Type and Number:
WIPO Patent Application WO/2010/103598
Kind Code:
A1
Abstract:
A bias circuit is provided with a first voltage generating section (7) having characteristics of generating, with a high accuracy, a bias voltage of a predetermined constant value with a large power consumption, and a second voltage generating section (9) which generates, with a lower accuracy compared with the first voltage generating section, a bias voltage of a predetermined constant value with a power consumption lower than that of the first voltage generating section. The first voltage generating section and the second voltage generating section are connected in parallel, and output a constant bias voltage to a common bias voltage output terminal. The voltage generating sections are controlled such that the first voltage generating section outputs the bias voltage in the operating state, and in the standby state, the first voltage generating section stops the output and the second voltage generating section outputs the bias voltage. The bias circuit meets the demand for reduction of power consumption in the standby state without increasing the time required before having the bias voltage in the normal state when the state is switched from the standby state to the operating state.

Inventors:
NAKAYAMA KAZUYA
MASAI SHIGEO
YAMASAKI SHUYA
Application Number:
PCT/JP2009/006983
Publication Date:
September 16, 2010
Filing Date:
December 17, 2009
Export Citation:
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Assignee:
PANASONIC CORP (JP)
NAKAYAMA KAZUYA
MASAI SHIGEO
YAMASAKI SHUYA
International Classes:
H03F1/02
Foreign References:
JP2001117650A2001-04-27
JPH10224158A1998-08-21
JP2007036486A2007-02-08
JP2003054324A2003-02-26
JP2000013331A2000-01-14
JPH06168038A1994-06-14
Attorney, Agent or Firm:
IKEUCHI SATO & PARTNER PATENT ATTORNEYS (JP)
Patent business corporation Ikeuchi and Sato and partners (JP)
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