Title:
BUILT-IN SELF-TEST METHOD AND DEVICE
Document Type and Number:
WIPO Patent Application WO/2024/060316
Kind Code:
A1
Abstract:
A built-in self-test method and device. The built-in self-test method comprises: acquiring a first initial address of a storage region (110) of data to be written, and masking at least one bit address of the first initial address, so as to activate a plurality of storage regions (S101, S501); writing test data into a corresponding storage region (110) according to a first compressed write address (S102, S502); acquiring a second initial address of a storage region (110) of data to be read, and masking at least one bit address of the second initial address, so as to activate a plurality of storage regions (110) (S103, S601); reading test data corresponding to the plurality of storage regions (110) according to a first compressed read address, and compressing the test data in a read-out process (S104, S602); and calculating ideal read-out data according to the test data and a preset compression processing rule, and comparing read-out data of a memory and the ideal read-out data, and obtaining a test result (S105). The built-in self-test method and device can improve test efficiency.
Inventors:
SUN YUANYUAN (CN)
WANG JIA (CN)
WANG JIA (CN)
Application Number:
PCT/CN2022/123947
Publication Date:
March 28, 2024
Filing Date:
October 09, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
G11C29/08
Foreign References:
| CN103943152A | 2014-07-23 | |||
| CN114582411A | 2022-06-03 | |||
| CN103310850A | 2013-09-18 | |||
| CN103310852A | 2013-09-18 | |||
| CN106971761A | 2017-07-21 | |||
| CN111145826A | 2020-05-12 | |||
| CN112614534A | 2021-04-06 | |||
| US5936975A | 1999-08-10 |
Attorney, Agent or Firm:
LEADER PATENT & TRADEMARK FIRM (CN)
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