Title:
ON-CHIP CAPACITORS IN THREE-DIMENSIONAL SEMICONDUCTOR DEVICES AND METHODS FOR FORMING THE SAME
Document Type and Number:
WIPO Patent Application WO/2022/061796
Kind Code:
A1
Abstract:
Three-dimensional (3D) semiconductor devices and methods for forming the same are disclosed. A 3D memory device includes a memory stack (104), an isolation structure (114), and a plurality of capacitor contacts (126). The memory stack (104) includes vertically interleaved conductive layers (106) and first dielectric layers (108). The isolation structure (114) extends vertically through at least part of the memory stack (104) to electrically separate the conductive layers (106) into gate electrodes (106A) in a core array region (110) and capacitor electrodes (106B) in a dummy staircase region (112). The plurality of capacitor contacts (126) are in contact with at least two of the capacitor electrodes (106B) in the dummy staircase region (112), respectively.
Inventors:
CHEN LIANG (CN)
LIU WEI (CN)
XUE LEI (CN)
LIU WEI (CN)
XUE LEI (CN)
Application Number:
PCT/CN2020/118022
Publication Date:
March 31, 2022
Filing Date:
September 27, 2020
Export Citation:
Assignee:
YANGTZE MEMORY TECH CO LTD (CN)
International Classes:
H01L27/06; H01L21/8242; H01L27/11573; H01L27/11575
Foreign References:
| CN107431063A | 2017-12-01 | |||
| CN103843137A | 2014-06-04 | |||
| US20090230449A1 | 2009-09-17 | |||
| US8956968B2 | 2015-02-17 | |||
| US8951859B2 | 2015-02-10 | |||
| CN110520984A | 2019-11-29 |
Attorney, Agent or Firm:
NTD UNIVATION INTELLECTUAL PROPERTY AGENCY LTD. (CN)
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