CLOCK GENERATION CIRCUIT AND LATCH USING SAME, AND COMPUTING DEVICE - HANGZHOU CANAAN INTELLIGENCE INFORMATION TECH CO LTD

Title:

CLOCK GENERATION CIRCUIT AND LATCH USING SAME, AND COMPUTING DEVICE

Document Type and Number:

WIPO Patent Application WO/2021/135102

Kind Code:

A1

Abstract:

Provided are a clock generation circuit and a latch using same, and a computing device. The cock generation circuit comprises an input end, used for inputting a pulse signal (CKI); a first output end, for outputting a first clock signal (CKO1); a second output end, used for outputting a second clock signal (CKO2); and an input drive circuit (101), a latch circuit (102), an edge shaping circuit (103), a feedback delay unit (104), and an output drive circuit (105), wherein the input drive circuit (101), the latch circuit (102), the edge shaping circuit (103), the feedback delay unit (104) and the output drive circuit (105) are sequentially connected between the input end and the first and second output ends in series. Accordingly, a clock pulse can be effectively shaped, the use of a clock buffer can be reduced, and the correctness and accuracy of data transmission and latching can be improved.

Inventors:

LIU JIEYAO (CN)
ZHANG NANGENG (CN)
WU JINGJIE (CN)
MA SHENGHOU (CN)

Application Number:

PCT/CN2020/098899

Publication Date:

July 08, 2021

Filing Date:

June 29, 2020

Export Citation:

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Assignee:

HANGZHOU CANAAN INTELLIGENCE INFORMATION TECH CO LTD (CN)

International Classes:

H03K5/06; H03K3/017

Foreign References:

CN103837243A	2014-06-04
CN1357135A	2002-07-03
CN103837243A	2014-06-04
CN103092255A	2013-05-08
CN102075167A	2011-05-25
US5767720A	1998-06-16

Other References: