Title:
CODING DEVICE, DECODING DEVICE, CODING METHOD, AND DECODING METHOD
Document Type and Number:
WIPO Patent Application WO/2019/225459
Kind Code:
A1
Abstract:
A coding device (100) is provided with a circuit (160), and a memory (162). The circuit (160) determines a filter to be used for deblocking filter processing from among a plurality of filters including a first filer and a second filter, using the memory (162) (S102), and performs the deblocking filter processing on a block boundary using the determined filter (S103). The first filter is a filter that uses M (M is an integer of 2 or more) pixels on the upper side of the block boundary and M pixels on the lower side of the block boundary, the second filter is a filter that uses first pixels on the upper side of the block boundary and second pixels on the lower side of the block boundary, the number of the first pixels is any of a first plurality of candidate values, the number of the second pixels is any of a second plurality of candidate values, and each of the first plurality of candidate values and each of the second plurality of candidate values are values equal to or larger than M.
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Inventors:
KANOH RYUICHI (JP)
NISHI TAKAHIRO
TOMA TADAMASA
ABE KIYOFUMI
NISHI TAKAHIRO
TOMA TADAMASA
ABE KIYOFUMI
Application Number:
PCT/JP2019/019453
Publication Date:
November 28, 2019
Filing Date:
May 16, 2019
Export Citation:
Assignee:
PANASONIC IP CORP AMERICA (US)
International Classes:
H04N19/117; H04N19/167; H04N19/182; H04N19/86
Domestic Patent References:
| WO2012035746A1 | 2012-03-22 | |||
| WO2010001911A1 | 2010-01-07 |
Other References:
HSU, CHIH-WEI ET AL.: "Description of SDR video coding technology proposal by MediaTek", JOINT VIDEO EXPLORATION TEAM (JVET) OF ITU-T SG 16 WP 3 AND ISO/IEC JTC 1/SC 29/WG 11 10TH MEETING, 10 April 2018 (2018-04-10), San Diego, US, pages 22 - 27
Attorney, Agent or Firm:
NII, Hiromori et al. (JP)
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