COMPLEMENTARY FIELD EFFECT TRANSISTOR, MANUFACTURING METHOD THEREFOR, MEMORY, AND ELECTRONIC DEVICE

WIPO Patent Application WO/2023/226446

A1

A complementary field effect transistor (CFET), a manufacturing method therefor, a memory, and an electronic device. The complementary field effect transistor comprises a first FET and a second FET, one of the first FET and the second FET is an N-type FET, and the other FET is a P-type FET. Since channel layers of the first FET and the second FET are arranged around or partially around a gate in a vertical direction, compared with a planar FET, the first FET and the second FET in the present application both have a small horizontal projection area. Moreover, the first FET and the second FET are stacked, so that a spacing between the horizontal projections of the first FET and the second FET can be reduced to 0, thereby realizing a CFET having a small horizontal projection area. Moreover, since the channel lengths of the two FETs in the CFET are determined by the distance between a source and a drain, the CFET can be manufactured by controlling the thickness of a film layer, without depending upon a high-precision photolithography technology; thus, the manufacturing process is simple and the cost is low.

SUN YING (CN)
HUANG KAILIANG (CN)
WANG ZHAOGUI (CN)
JING WEILIANG (CN)
WANG ZHENGBO (CN)
LIAO HENG (CN)

PCT/CN2023/070720

November 30, 2023

January 05, 2023

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HUAWEI TECH CO LTD (CN)

H01L27/092; H01L21/8238

US5140388A	1992-08-18
CN111755512A	2020-10-09
US20140070327A1	2014-03-13
US20180212054A1	2018-07-26

TDIP & PARTNERS (CN)

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