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Title:
DELTA-SIGMA MODULATOR
Document Type and Number:
WIPO Patent Application WO/2008/023710
Kind Code:
A1
Abstract:
A continuous-time delta-sigma modulator has an SC(SCR) feedback DA (103) for improving the jitter tolerance of clocks (CLK). The delta-sigma modulator is not affected by any manufacture process variations, operational temperature conditions and so on and exhibits a stable operation by maintaining a constant feedback amount. A reference voltage (Vref), which decides an output voltage of the SC feedback DA (103), is adjusted, whereby a constant amount of charge can be fed back from the SC feedback DA (103) to a loop filter (101). This stabilizes the operation of the delta-sigma modulator.

Inventors:
AIBA YUSUKE (JP)
Application Number:
PCT/JP2007/066210
Publication Date:
February 28, 2008
Filing Date:
August 21, 2007
Export Citation:
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Assignee:
ASAHI KASEI EMD CORP (JP)
AIBA YUSUKE (JP)
International Classes:
H03M3/02
Foreign References:
JP2005535229A2005-11-17
JP2000332553A2000-11-30
Other References:
TIEW K.-T. ET AL.: "DAC Compensation for Continuous-Time Delta-Sigma Modulators", IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS 2005 (ISCAS 2005), vol. 4, May 2005 (2005-05-01), pages 3680 - 3683, XP010816462
MAURITS ORTMANNS: "A Continuous-Time S L Modulator With Reduced Sensitivity to Clock Jitter Through SCR Feedback", IEEE TRANS. CIRCUITS SYST. I, REGULAR PAPERS, vol. 52, no. 5, May 2005 (2005-05-01), XP011131705, DOI: doi:10.1109/TCSI.2005.846227
ROBERT H.M. VAN VELDHOVEN: "A Triple-Mode Continuous-Time S L Modulator With Switched-Capacitor Feedback DAC for a GSM-EDGE/CDMA2000/UMTS Receiver", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 38, no. 12, December 2003 (2003-12-01)
See also references of EP 2056461A4
Attorney, Agent or Firm:
TANI, Yoshikazu (Akasaka 2-chome Minato-k, Tokyo 52, JP)
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