Title:
DRAM CELL MANUFACTURING METHOD
Document Type and Number:
WIPO Patent Application WO/2023/249450
Kind Code:
A1
Abstract:
A DRAM cell manufacturing method according to one mode may comprise the steps in which: an insulation layer is formed on a substrate; a channel layer is formed on the insulation layer; a high pressure heat treatment is performed in an oxygen environment; trenches are formed in portions of the channel layer and insulation layer; a first gate structure and a second gate structure are formed on the channel layer with the trench interposed therebetween; a first source and a first drain are formed with the first gate structure interposed therebetween; a second source and a second drain are formed with the second gate structure interposed therebetween; heat treatment is performed in a hydrogen environment; and a storage node line, which electrically connects the first drain and the second gate structure, is formed.
More Like This:
JP7213312 | semiconductor equipment |
JP2023091135 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE |
JP2023126275 | SEMICONDUCTOR DEVICE |
Inventors:
HWANG HYUNSANG (KR)
Application Number:
PCT/KR2023/008740
Publication Date:
December 28, 2023
Filing Date:
June 23, 2023
Export Citation:
Assignee:
HPSP CO LTD (KR)
POSTECH RES & BUSINESS DEV FOUND (KR)
POSTECH RES & BUSINESS DEV FOUND (KR)
International Classes:
H10B12/00
Foreign References:
KR20200051083A | 2020-05-13 | |||
KR20130085969A | 2013-07-30 | |||
JP2012256856A | 2012-12-27 | |||
KR20120125320A | 2012-11-14 | |||
KR20210142419A | 2021-11-25 |
Attorney, Agent or Firm:
DAE-A INTELLECTUAL PROPERTY CONSULTING (KR)
Download PDF: